diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-05-04 15:01:13 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-05-04 15:01:13 +0000 |
| commit | b97c06210b71dc1673fbff91dc8bc901270116a4 (patch) | |
| tree | 1da9a741a9fe677e197a3e00568bb8c9512c3b18 /llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | |
| parent | bbc223198376d7e8a636309efc42b2e2927185a3 (diff) | |
| download | bcm5719-llvm-b97c06210b71dc1673fbff91dc8bc901270116a4.tar.gz bcm5719-llvm-b97c06210b71dc1673fbff91dc8bc901270116a4.zip | |
[SelectionDAG] BITREVERSE vector legalization of bit operations
Vector bit operations are typically promoted instead of having custom lowering. This patch changes the isOperationLegalOrCustom tests for vector AND/OR operations to use isOperationLegalOrPromote instead, allowing the SSE implementations to stay on the simd unit.
Differential Revision: http://reviews.llvm.org/D19805
llvm-svn: 268504
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp index 11d470d066d..3771ef9f04f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp @@ -894,8 +894,8 @@ SDValue VectorLegalizer::ExpandBITREVERSE(SDValue Op) { // than unrolling and expanding each component. if (!TLI.isOperationLegalOrCustom(ISD::SHL, VT) || !TLI.isOperationLegalOrCustom(ISD::SRL, VT) || - !TLI.isOperationLegalOrCustom(ISD::AND, VT) || - !TLI.isOperationLegalOrCustom(ISD::OR, VT)) + !TLI.isOperationLegalOrPromote(ISD::AND, VT) || + !TLI.isOperationLegalOrPromote(ISD::OR, VT)) return DAG.UnrollVectorOp(Op.getNode()); // Let LegalizeDAG handle this later. |
