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path: root/llvm/lib/CodeGen/MachineVerifier.cpp
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* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-3/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"Matthias Braun2017-10-121-2/+4
* TargetMachine: Merge TargetMachine and LLVMTargetMachineMatthias Braun2017-10-121-4/+2
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use wa...Eugene Zelenko2017-09-111-30/+60
* LiveIntervalAnalysis: Fix alias regunit reserved definitionMatthias Braun2017-09-011-0/+2
* [GISEl]: Translate phi into G_PHIAditya Nandakumar2017-08-231-0/+17
* [MachineVerifier] Add check that tied physregs aren't different.Mikael Holmen2017-07-061-0/+8
* RegAllocPBQP: Do not assign reserved physical registerMatthias Braun2017-06-081-4/+5
* Sort the remaining #include lines in include/... and lib/....Chandler Carruth2017-06-061-1/+1
* Verify a couple more fields in STATEPOINT instructionsPhilip Reames2017-06-021-0/+14
* Add placeholder for more extensive verification of psuedo opsPhilip Reames2017-06-021-8/+21
* MachineVerifier: Remove unused set; NFCMatthias Braun2017-05-261-5/+0
* BitVector: add iterators for set bitsFrancis Visoiu Mistrih2017-05-171-1/+1
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-091-2/+2
* ARM: Compute MaxCallFrame size earlyMatthias Braun2017-05-051-3/+5
* Do not run frame verification if target does not use frame instructionsSerge Pavlov2017-04-201-0/+2
* Use methods to access data stored with frame instructionsSerge Pavlov2017-04-131-11/+2
* MIR: Allow parsing of empty machine functionsJustin Bogner2017-04-111-2/+4
* [MachineVerifier] Drop a spurious constSven van Haastregt2017-03-291-1/+1
* [MachineVerifier] Avoid reference to nullptrSven van Haastregt2017-03-291-2/+2
* GlobalISel: verify that generic loads & stores have a mem operand.Tim Northover2017-02-171-0/+8
* Fix typosMatt Arsenault2017-02-151-1/+1
* CodeGen: Assert that liveness is up to date when reading block live-ins.Matthias Braun2017-01-051-8/+10
* [GlobalISel] More fix for the size vs. type typo. NFC.Quentin Colombet2016-12-221-1/+1
* [MachineVerifier] Check that even generic vregs comply to regclass constraints.Quentin Colombet2016-12-221-0/+15
* Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek2016-12-161-10/+10
* Extract LaneBitmask into a separate typeKrzysztof Parzyszek2016-12-151-25/+27
* Clarify rules for reserved regs, fix aarch64 ones.Matthias Braun2016-11-301-10/+0
* Modify df_iterator to support post-order actionsDavid Callahan2016-10-051-2/+2
* GlobalISel: remove "unsized" LLTTim Northover2016-09-151-1/+1
* GlobalISel: remove G_TYPE and G_PHITim Northover2016-09-091-2/+1
* GlobalISel: move type information to MachineRegisterInfo.Tim Northover2016-09-091-12/+24
* ADT: Remove external uses of ilist_iterator, NFCDuncan P. N. Exon Smith2016-09-031-5/+2
* GlobalISel: use G_TYPE to annotate physregs with a type.Tim Northover2016-08-311-1/+2
* GlobalISel: forbid physical registers on generic MIs.Tim Northover2016-08-301-0/+8
* Do not use MRI::getMaxLaneMaskForVReg as a mask covering whole registerKrzysztof Parzyszek2016-08-291-3/+2
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compu...Matthias Braun2016-08-251-7/+4
* Create subranges for new intervals resulting from live interval splittingKrzysztof Parzyszek2016-08-241-4/+11
* MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.Matthias Braun2016-08-241-1/+2
* MachineFunction: Introduce NoPHIs propertyMatthias Braun2016-08-231-0/+4
* Use the range variant of find instead of unpacking begin/endDavid Majnemer2016-08-111-1/+1
* [GlobalISel] Verify Selected MF property.Ahmed Bougacha2016-08-021-1/+15
* [GlobalISel] Verify RegBankSelected MF property.Ahmed Bougacha2016-08-021-1/+17
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-281-3/+2
* [GlobalISel] Remove types on selected insts instead of using LLT().Ahmed Bougacha2016-07-281-0/+10
* MachineVerifier: Fix printing nonsense for physical registersMatt Arsenault2016-07-251-3/+3
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-151-2/+2
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-1/+1
* AMDGPU: Add convergent flag to INLINEASM instruction.Wei Ding2016-06-221-2/+3
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