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| author | Tim Northover <tnorthover@apple.com> | 2016-08-31 21:24:02 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2016-08-31 21:24:02 +0000 |
| commit | 11a235467088c800fe0a7323cb18a55fe9fe0cd3 (patch) | |
| tree | b8a59758a42fd6d569adfd9b48779a935c3337fe /llvm/lib/CodeGen/MachineVerifier.cpp | |
| parent | 7caf48cc5bd762a1a5a363c73ec31184cf89e9bc (diff) | |
| download | bcm5719-llvm-11a235467088c800fe0a7323cb18a55fe9fe0cd3.tar.gz bcm5719-llvm-11a235467088c800fe0a7323cb18a55fe9fe0cd3.zip | |
GlobalISel: use G_TYPE to annotate physregs with a type.
More preparation for dropping source types from MachineInstrs: regsters coming
out of already-selected code (i.e. non-generic instructions) don't have a type,
but that information is needed so we must add it manually.
This is done via a new G_TYPE instruction.
llvm-svn: 280292
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 479c9e7eeae..0b8a85d9af7 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -903,7 +903,8 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) { } // Generic opcodes must not have physical register operands. - if (isPreISelGenericOpcode(MCID.getOpcode())) { + if (isPreISelGenericOpcode(MCID.getOpcode()) && + MCID.getOpcode() != TargetOpcode::G_TYPE) { for (auto &Op : MI->operands()) { if (Op.isReg() && TargetRegisterInfo::isPhysicalRegister(Op.getReg())) report("Generic instruction cannot have physical register", MI); |
