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author | Tim Northover <tnorthover@apple.com> | 2016-09-15 10:09:59 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2016-09-15 10:09:59 +0000 |
commit | 32a078ad1a60eb2bc838d7bd341edefb0c0179d1 (patch) | |
tree | 57525d0678415a813b4363d97922a2e82b152b5c /llvm/lib/CodeGen/MachineVerifier.cpp | |
parent | 6a5bac48cf9a033b4c8e974d95bbd2217a151635 (diff) | |
download | bcm5719-llvm-32a078ad1a60eb2bc838d7bd341edefb0c0179d1.tar.gz bcm5719-llvm-32a078ad1a60eb2bc838d7bd341edefb0c0179d1.zip |
GlobalISel: remove "unsized" LLT
It was only really there as a sentinel when instructions had to have precisely
one type. Now that registers are typed, each register really has to have a type
that is sized.
llvm-svn: 281599
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 808f81a567b..33bf9abc8ef 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -1051,7 +1051,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { } // Make sure the register fits into its register bank if any. - if (RegBank && Ty.isSized() && + if (RegBank && Ty.isValid() && RegBank->getSize() < Ty.getSizeInBits()) { report("Register bank is too small for virtual register", MO, MONum); |