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author | Tim Northover <tnorthover@apple.com> | 2016-09-09 11:47:31 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2016-09-09 11:47:31 +0000 |
commit | 25d1286e5a8d7ff1521d3ee755640c61865ac325 (patch) | |
tree | f4059d9b2d66ca3988c6af9c278e5097d0146a74 /llvm/lib/CodeGen/MachineVerifier.cpp | |
parent | 1f8b1db93e76fc65d1113b60c4794cd241fd2145 (diff) | |
download | bcm5719-llvm-25d1286e5a8d7ff1521d3ee755640c61865ac325.tar.gz bcm5719-llvm-25d1286e5a8d7ff1521d3ee755640c61865ac325.zip |
GlobalISel: remove G_TYPE and G_PHI
These instructions were only necessary when type information was stored in the
MachineInstr (because only generic MachineInstrs possessed a type). Now that
it's in MachineRegisterInfo, COPY and PHI work fine.
llvm-svn: 281037
Diffstat (limited to 'llvm/lib/CodeGen/MachineVerifier.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index f06394279c9..808f81a567b 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -908,8 +908,7 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) { } // Generic opcodes must not have physical register operands. - if (isPreISelGenericOpcode(MCID.getOpcode()) && - MCID.getOpcode() != TargetOpcode::G_TYPE) { + if (isPreISelGenericOpcode(MCID.getOpcode())) { for (auto &Op : MI->operands()) { if (Op.isReg() && TargetRegisterInfo::isPhysicalRegister(Op.getReg())) report("Generic instruction cannot have physical register", MI); |