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* [Clang] Enable RISC-V support for FuchsiaPetr Hosek2019-11-211-0/+2
| | | | | | | | We don't have a full sysroot yet, so for now we only include compiler support and compiler-rt builtins, the rest of the runtimes will get enabled later. Differential Revision: https://reviews.llvm.org/D70477
* [PowerPC] Add new Future CPU for PowerPCStefan Pintilie2019-11-212-3/+27
| | | | | | | | | | | This patch will add -mcpu=future into clang for PowerPC. A CPU type is required for work that may possibly be enabled for some future Power CPU. The CPU type future will serve that purpose. This patch introduces no new functionality. It is an incremental patch on top of which Power PC work for some future CPU can be done. Differential Revision: https://reviews.llvm.org/D70262
* [OPENMP50]Add if clause in for simd directive.Alexey Bataev2019-11-211-0/+2
| | | | | | According to OpenMP 5.0, if clause can be used in for simd directive. If condition in the if clause if false, the non-vectorized version of the loop must be executed.
* Reland 9f3fdb0d7fab: [Driver] Use VFS to check if sanitizer blacklists existIlya Biryukov2019-11-212-5/+8
| | | | | | | With updates to various LLVM tools that use SpecialCastList. It was tempting to use RealFileSystem as the default, but that makes it too easy to accidentally forget passing VFS in clang code.
* Revert "[Driver] Use VFS to check if sanitizer blacklists exist"Ilya Biryukov2019-11-212-8/+5
| | | | | This reverts commit ba6f906854263375cff3257d22d241a8a259cf77. Commit caused compilation errors on llvm tests. Will fix and re-land.
* [Driver] Use VFS to check if sanitizer blacklists existIlya Biryukov2019-11-212-5/+8
| | | | | | | | | | | | | | | | | | | Summary: This is a follow-up to 590f279c456bbde632eca8ef89a85c478f15a249, which moved some of the callers to use VFS. It turned out more code in Driver calls into real filesystem APIs and also needs an update. Reviewers: gribozavr2, kadircet Reviewed By: kadircet Subscribers: ormris, mgorny, hiraditya, llvm-commits, jkorous, cfe-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D70440
* [OPENMP50]Add if clause in simd directive.Alexey Bataev2019-11-191-1/+4
| | | | | | According to OpenMP 5.0, if clause can be used in simd directive. If condition in the if clause if false, the non-vectorized version of the loop must be executed.
* [ARM] Allocatable Global Register Variables for ARMAnna Welker2019-11-182-0/+35
| | | | | | | | | | | | Provides support for using r6-r11 as globally scoped register variables. This requires a -ffixed-rN flag in order to reserve rN against general allocation. If for a given GRV declaration the corresponding flag is not found, or the the register in question is the target's FP, we fail with a diagnostic. Differential Revision: https://reviews.llvm.org/D68862
* Implement target(branch-protection) attribute for AArch64Momchil Velikov2019-11-152-0/+27
| | | | | | | | | This patch implements `__attribute__((target("branch-protection=...")))` in a manner, compatible with the analogous GCC feature: https://gcc.gnu.org/onlinedocs/gcc-9.2.0/gcc/AArch64-Function-Attributes.html#AArch64-Function-Attributes Differential Revision: https://reviews.llvm.org/D68711
* Add 8548 CPU definition and attributesJustin Hibbits2019-11-122-11/+20
| | | | | | | | 8548 CPU is GCC's name for the e500v2, so accept this in clang. The e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well, as GCC does. Differential Revision: https://reviews.llvm.org/D67787
* AArch64: add arm64_32 support to Clang.Tim Northover2019-11-123-7/+38
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* clang/Modules: Delay err_module_file_conflict if a diagnostic is in flightDuncan P. N. Exon Smith2019-11-111-2/+3
| | | | | | | As part of an audit of whether all errors are being reported from the ASTReader, delay err_module_file_conflict if a diagnostic is already in flight when it is hit. This required plumbing an extra argument through the delayed diagnostic mechanics in DiagnosticsEngine.
* [OPENMP50]Generalize handling of context matching/scoring.Alexey Bataev2019-11-111-0/+43
| | | | | | | | | | | | | | Summary: Untie context matching/scoring from the attribute for declare variant directive to simplify future uses in other context-dependent directives. Reviewers: jdoerfert Subscribers: guansong, kkwli0, caomhin, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69952
* Basic: fix FileManager invalidation issue for file redirectAlex Suhan2019-11-081-7/+11
| | | | | Insertion into SeenFileEntries can invalidate iterators, we need to do another lookup on the re-intern path.
* [clang] Add VFS support for sanitizers' blacklistsJan Korous2019-11-082-4/+8
| | | | Differential Revision: https://reviews.llvm.org/D69648
* remove redundant LLVM version from version string when setting CLANG_VENDORNick Desaulniers2019-11-081-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When downstream LLVM distributions (like AOSP) set the CLANG_VENDOR cmake variable, the version string printed by the clang driver looks like: $ clang --version [CLANG_VENDOR] clang version X.X.X ([CLANG_REPOSITORY_STRING] sha) (based on LLVM X.X.X) Rather than the more standard: $ clang --version clang version X.X.X ([CLANG_REPOSITORY_STRING] sha) Based on feedback the the version string is a little long, the trailing "(based on LLVM X.X.X)" is redundant and makes less sense after moving LLVM to the monorepo. And it is only added should vendors set the cmake variable CLANG_VENDOR. Let's remove it. Reviewers: jyknight, eli.friedman, rsmith, rjmccall, efriedma Reviewed By: efriedma Subscribers: arphaman, efriedma, cfe-commits, srhines Tags: #clang Differential Revision: https://reviews.llvm.org/D69925
* [mips] Set macros for Octeon+ CPUSimon Atanasyan2019-11-071-2/+5
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* [mips] Add `octeon+` to the list of CPUs accepted by the driverSimon Atanasyan2019-11-072-1/+4
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* [X86] Add 'fxsr' feature to -march=pentium2 to match X86.td and gcc.Craig Topper2019-11-061-1/+2
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* [X86] Add 'mmx' to all CPUs that have a version of 'sse' and weren't already ↵Craig Topper2019-11-061-7/+11
| | | | | | | | | | | | | | enabling '3dnow' All SSE capable CPUs have MMX. 3dnow implicitly enables MMX. We have code that detects if sse is enabled and implicitly enables MMX unless -mno-mmx is passed. So in most cases we were already enabling MMX if march passed a CPU that supported SSE. The exception to this is if you pass -march for a cpu supports SSE and also pass -mno-sse. We should still enable MMX since its part of the CPU capability.
* [mips] Set __OCTEON__ macrosSimon Atanasyan2019-11-051-0/+3
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* [mips] Fix `__mips_isa_rev` macros value for Octeon CPUSimon Atanasyan2019-11-051-1/+1
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* [OPENMP50]Add support for parallel master taskloop simd directive.Alexey Bataev2019-10-301-4/+19
| | | | Added full support for parallel master taskloop simd directive.
* isBuiltinFunc() uses StringRef instead of const char*Guillaume Chatelet2019-10-291-2/+1
| | | | | | | | | | | | Summary: This prevents a bug when passing nullptr, StringRef ctor would call strlen(nullptr). Reviewers: vlad.tsyrklevich Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69569
* [Hexagon] Handle remaining registers in getRegisterByName()Krzysztof Parzyszek2019-10-291-1/+4
| | | | This fixes https://llvm.org/PR43829.
* [clang-format] Remove duplciate code from Invalid BOM detectionpaulhoad2019-10-241-14/+24
| | | | | | | | | | | | | | | | | | | | | | Summary: Review comments on {D68767} asked that this duplicated code in clang-format was moved to one central location that being SourceManager (where it had originally be copied from I assume) Moved function into static function ContentCache::getInvalidBOM(...) - (closest class to where it was defined before) Updated clang-format to call this static function Added unit tests for said new function in BasicTests Sorry not my normal code area so may have the wrong reviewers. (but your names were on the recent history) Reviewers: bruno, arphaman, klimek, owenpan, mitchell-stellar, dexonsmith Reviewed By: owenpan Subscribers: cfe-commits Tags: #clang, #clang-format, #clang-tools-extra Differential Revision: https://reviews.llvm.org/D68914
* Prune include of DataLayout.h from include/clang/Basic/TargetInfo.h. NFCBjorn Pettersson2019-10-212-0/+6
| | | | | | | | | | | | | | | | | | | | | | | Summary: Use a forward declaration of DataLayout instead of including DataLayout.h in clangs TargetInfo.h. This reduces include dependencies toward DataLayout.h (and other headers such as DerivedTypes.h, Type.h that is included by DataLayout.h). Needed to move implemantation of TargetInfo::resetDataLayout from TargetInfo.h to TargetInfo.cpp. Reviewers: rnk Reviewed By: rnk Subscribers: jvesely, nhaehnle, cfe-commits, llvm-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D69262 llvm-svn: 375438
* [OPENMP50]Add support for master taskloop simd.Alexey Bataev2019-10-181-2/+14
| | | | | | Added trsing/semantics/codegen for combined construct master taskloop simd. llvm-svn: 375255
* [OPENMP50]Add support for 'parallel master taskloop' construct.Alexey Bataev2019-10-141-3/+20
| | | | | | | | | Added parsing/sema/codegen support for 'parallel master taskloop' constructs. Some of the clauses, like 'grainsize', 'num_tasks', 'final' and 'priority' are not supported in full, only constant expressions can be used currently in these clauses. llvm-svn: 374791
* [Stats] Convert some ad-hoc header search stats to ALWAYS_ENABLED_STATISTIC.Volodymyr Sapsai2019-10-111-4/+10
| | | | | | | | | | | | | | | | rdar://problem/55715134 Reviewers: dsanders, bogner, rtereshin Reviewed By: dsanders Subscribers: hiraditya, jkorous, dexonsmith, ributzka, cfe-commits, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D68252 llvm-svn: 374581
* [OPENMP50]Support for 'master taskloop' directive.Alexey Bataev2019-10-101-2/+15
| | | | | | Added full support for master taskloop directive. llvm-svn: 374437
* [BPF] do compile-once run-everywhere relocation for bitfieldsYonghong Song2019-10-082-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A bpf specific clang intrinsic is introduced: u32 __builtin_preserve_field_info(member_access, info_kind) Depending on info_kind, different information will be returned to the program. A relocation is also recorded for this builtin so that bpf loader can patch the instruction on the target host. This clang intrinsic is used to get certain information to facilitate struct/union member relocations. The offset relocation is extended by 4 bytes to include relocation kind. Currently supported relocation kinds are enum { FIELD_BYTE_OFFSET = 0, FIELD_BYTE_SIZE, FIELD_EXISTENCE, FIELD_SIGNEDNESS, FIELD_LSHIFT_U64, FIELD_RSHIFT_U64, }; for __builtin_preserve_field_info. The old access offset relocation is covered by FIELD_BYTE_OFFSET = 0. An example: struct s { int a; int b1:9; int b2:4; }; enum { FIELD_BYTE_OFFSET = 0, FIELD_BYTE_SIZE, FIELD_EXISTENCE, FIELD_SIGNEDNESS, FIELD_LSHIFT_U64, FIELD_RSHIFT_U64, }; void bpf_probe_read(void *, unsigned, const void *); int field_read(struct s *arg) { unsigned long long ull = 0; unsigned offset = __builtin_preserve_field_info(arg->b2, FIELD_BYTE_OFFSET); unsigned size = __builtin_preserve_field_info(arg->b2, FIELD_BYTE_SIZE); #ifdef USE_PROBE_READ bpf_probe_read(&ull, size, (const void *)arg + offset); unsigned lshift = __builtin_preserve_field_info(arg->b2, FIELD_LSHIFT_U64); #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ lshift = lshift + (size << 3) - 64; #endif #else switch(size) { case 1: ull = *(unsigned char *)((void *)arg + offset); break; case 2: ull = *(unsigned short *)((void *)arg + offset); break; case 4: ull = *(unsigned int *)((void *)arg + offset); break; case 8: ull = *(unsigned long long *)((void *)arg + offset); break; } unsigned lshift = __builtin_preserve_field_info(arg->b2, FIELD_LSHIFT_U64); #endif ull <<= lshift; if (__builtin_preserve_field_info(arg->b2, FIELD_SIGNEDNESS)) return (long long)ull >> __builtin_preserve_field_info(arg->b2, FIELD_RSHIFT_U64); return ull >> __builtin_preserve_field_info(arg->b2, FIELD_RSHIFT_U64); } There is a minor overhead for bpf_probe_read() on big endian. The code and relocation generated for field_read where bpf_probe_read() is used to access argument data on little endian mode: r3 = r1 r1 = 0 r1 = 4 <=== relocation (FIELD_BYTE_OFFSET) r3 += r1 r1 = r10 r1 += -8 r2 = 4 <=== relocation (FIELD_BYTE_SIZE) call bpf_probe_read r2 = 51 <=== relocation (FIELD_LSHIFT_U64) r1 = *(u64 *)(r10 - 8) r1 <<= r2 r2 = 60 <=== relocation (FIELD_RSHIFT_U64) r0 = r1 r0 >>= r2 r3 = 1 <=== relocation (FIELD_SIGNEDNESS) if r3 == 0 goto LBB0_2 r1 s>>= r2 r0 = r1 LBB0_2: exit Compare to the above code between relocations FIELD_LSHIFT_U64 and FIELD_LSHIFT_U64, the code with big endian mode has four more instructions. r1 = 41 <=== relocation (FIELD_LSHIFT_U64) r6 += r1 r6 += -64 r6 <<= 32 r6 >>= 32 r1 = *(u64 *)(r10 - 8) r1 <<= r6 r2 = 60 <=== relocation (FIELD_RSHIFT_U64) The code and relocation generated when using direct load. r2 = 0 r3 = 4 r4 = 4 if r4 s> 3 goto LBB0_3 if r4 == 1 goto LBB0_5 if r4 == 2 goto LBB0_6 goto LBB0_9 LBB0_6: # %sw.bb1 r1 += r3 r2 = *(u16 *)(r1 + 0) goto LBB0_9 LBB0_3: # %entry if r4 == 4 goto LBB0_7 if r4 == 8 goto LBB0_8 goto LBB0_9 LBB0_8: # %sw.bb9 r1 += r3 r2 = *(u64 *)(r1 + 0) goto LBB0_9 LBB0_5: # %sw.bb r1 += r3 r2 = *(u8 *)(r1 + 0) goto LBB0_9 LBB0_7: # %sw.bb5 r1 += r3 r2 = *(u32 *)(r1 + 0) LBB0_9: # %sw.epilog r1 = 51 r2 <<= r1 r1 = 60 r0 = r2 r0 >>= r1 r3 = 1 if r3 == 0 goto LBB0_11 r2 s>>= r1 r0 = r2 LBB0_11: # %sw.epilog exit Considering verifier is able to do limited constant propogation following branches. The following is the code actually traversed. r2 = 0 r3 = 4 <=== relocation r4 = 4 <=== relocation if r4 s> 3 goto LBB0_3 LBB0_3: # %entry if r4 == 4 goto LBB0_7 LBB0_7: # %sw.bb5 r1 += r3 r2 = *(u32 *)(r1 + 0) LBB0_9: # %sw.epilog r1 = 51 <=== relocation r2 <<= r1 r1 = 60 <=== relocation r0 = r2 r0 >>= r1 r3 = 1 if r3 == 0 goto LBB0_11 r2 s>>= r1 r0 = r2 LBB0_11: # %sw.epilog exit For native load case, the load size is calculated to be the same as the size of load width LLVM otherwise used to load the value which is then used to extract the bitfield value. Differential Revision: https://reviews.llvm.org/D67980 llvm-svn: 374099
* [OPENMP]Use standard parsing for 'match' clause, NFC.Alexey Bataev2019-09-231-1/+15
| | | | | | | Reused standard clauses parsing scheme for parsing/matching 'match' clause in 'declare variant' directive. llvm-svn: 372635
* [SystemZ] Support z15 processor nameUlrich Weigand2019-09-201-1/+1
| | | | | | | | | | The recently announced IBM z15 processor implements the architecture already supported as "arch13" in LLVM. This patch adds support for "z15" as an alternate architecture name for arch13. Corrsponding LLVM support was committed as rev. 372435. llvm-svn: 372436
* [ARM] Update clang for removal of vfp2d16 and vfp2d16spEli Friedman2019-09-171-3/+2
| | | | | | | | Matching fix for https://reviews.llvm.org/D67375 (r372186). Differential Revision: https://reviews.llvm.org/D67467 llvm-svn: 372187
* [RISCV] Define __riscv_cmodel_medlow and __riscv_cmodel_medany correctlyKito Cheng2019-09-171-2/+8
| | | | | | | | | | | | | | RISC-V LLVM was only implement small/medlow code model, so it defined __riscv_cmodel_medlow directly without check. Now, we have medium/medany code model in RISC-V back-end, it should define according the actually code model. Reviewed By: lewis-revill Differential Revision: https://reviews.llvm.org/D67065 llvm-svn: 372078
* Move some definitions from Sema to Basic to fix shared libs buildErich Keane2019-09-161-1/+74
| | | | | | | | r371875 moved some functionality around to a Basic header file, but didn't move its definitions as well. This patch moves some things around so that shared library building can work. llvm-svn: 371985
* [OPENMP5.0]Add basic support for declare variant directive.Alexey Bataev2019-09-131-2/+3
| | | | | | | Added basic support for declare variant directive and its match clause with user context selector. llvm-svn: 371892
* Reland "Change the X86 datalayout to add three address spacesAmy Huang2019-09-102-14/+24
| | | | | | | | | | for 32 bit signed, 32 bit unsigned, and 64 bit pointers." This reverts 57076d3199fc2b0af4a3736b7749dd5462cacda5. Original review at https://reviews.llvm.org/D64931. Review for added fix at https://reviews.llvm.org/D66843. llvm-svn: 371568
* [ARM] Add support for the s,j,x,N,O inline asm constraintsDavid Candler2019-09-051-5/+88
| | | | | | | | | | | | | | | | | | | | | | A number of inline assembly constraints are currently supported by LLVM, but rejected as invalid by Clang: Target independent constraints: s: An integer constant, but allowing only relocatable values ARM specific constraints: j: An immediate integer between 0 and 65535 (valid for MOVW) x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or q0-q3 N: An immediate integer between 0 and 31 (Thumb1 only) O: An immediate integer which is a multiple of 4 between -508 and 508. (Thumb1 only) This patch adds support to Clang for the missing constraints along with some checks to ensure that the constraints are used with the correct target and Thumb mode, and that immediates are within valid ranges (at least where possible). The constraints are already implemented in LLVM, but just a couple of minor corrections to checks (V8M Baseline includes MOVW so should work with 'j', 'N' and 'O' shouldn't be valid in Thumb2) so that Clang and LLVM are in line with each other and the documentation. Differential Revision: https://reviews.llvm.org/D65863 Change-Id: I18076619e319bac35fbb60f590c069145c9d9a0a llvm-svn: 371079
* Add -m(no)-spe to clangJustin Hibbits2019-09-052-1/+10
| | | | | | | | | | | | | | Summary: r337347 added support for the Signal Processing Engine (SPE) to LLVM. This follows that up with the clang side. This adds -mspe and -mno-spe, to match GCC. Subscribers: nemanjai, kbarton, cfe-commits Differential Revision: https://reviews.llvm.org/D49754 llvm-svn: 371066
* AMDGPU: Add builtins for is_shared/is_privateMatt Arsenault2019-09-051-0/+2
| | | | llvm-svn: 371010
* [RISCV] Correct Logic around ilp32e macrosSam Elliott2019-09-031-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: GCC seperates the `__riscv_float_abi_*` macros and the `__riscv_abi_rve` macro. If the chosen abi is ilp32e, `gcc -march=rv32i -mabi=ilp32i -E -dM` shows that both `__riscv_float_abi_soft` and `__riscv_abi_rve` are set. This patch corrects the compiler logic around these defines. At the moment, this patch will not change clang's behaviour, because we do not accept the `ilp32e` abi yet. Reviewers: luismarques, asb Reviewed By: luismarques Subscribers: rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66591 llvm-svn: 370709
* Introduce a DirectoryEntryRef that stores both a reference and anAlex Lorenz2019-08-311-14/+17
| | | | | | | | | | | | | | accessed name to the directory entry This commit introduces a parallel API that returns a DirectoryEntryRef to the FileManager, similar to the parallel FileEntryRef API. All uses will have to be update in follow-up patches. The immediate use of the new API in this patch fixes the issue where a file manager was reused in clang-scan-deps, but reported an different file path whenever a framework lookup was done through a symlink. Differential Revision: https://reviews.llvm.org/D67026 llvm-svn: 370562
* ASTReader: Bypass overridden files when reading PCHsDuncan P. N. Exon Smith2019-08-302-16/+31
| | | | | | | | | | | | | | | | | | | | | If contents of a file that is part of a PCM are overridden when reading it, but weren't overridden when the PCM was being built, the ASTReader will emit an error. Now it creates a separate FileEntry for recovery, bypassing the overridden content instead of discarding it. The pre-existing testcase clang/test/PCH/remap-file-from-pch.cpp confirms that the new recovery method works correctly. This resolves a long-standing FIXME to avoid hypothetically invalidating another precompiled module that's already using the overridden contents. This also removes ContentCache-related API that would be unsafe to use across `CompilerInstance`s in an implicit modules build. This helps to unblock us sinking it from SourceManager into FileManager in the future, which would allow us to delete `InMemoryModuleCache`. https://reviews.llvm.org/D66710 llvm-svn: 370546
* FileManager: Remove ShouldCloseOpenFile argument from getBufferForFile, NFCDuncan P. N. Exon Smith2019-08-301-6/+2
| | | | | | Remove this dead code. We always close it. llvm-svn: 370488
* Remove `FileManager::invalidateCache` as it has no callers anymore. NFC.Volodymyr Sapsai2019-08-291-14/+0
| | | | llvm-svn: 370400
* [X86] Remove what little support we had for MPXCraig Topper2019-08-292-9/+0
| | | | | | | | | | | | | | | -Deprecate -mmpx and -mno-mpx command line options -Remove CPUID detection of mpx for -march=native -Remove MPX from all CPUs -Remove MPX preprocessor define I've left the "mpx" string in the backend so we don't fail on old IR, but its not connected to anything. gcc has also deprecated these command line options. https://www.phoronix.com/scan.php?page=news_item&px=GCC-Patch-To-Drop-MPX Differential Revision: https://reviews.llvm.org/D66669 llvm-svn: 370393
* Revert "Change the X86 datalayout to add three address spaces for 32 bit ↵Vlad Tsyrklevich2019-08-282-24/+14
| | | | | | | | | signed," This reverts commit r370083 because it caused check-lld failures on sanitizer-x86_64-linux-fast. llvm-svn: 370142
* Change the X86 datalayout to add three address spaces for 32 bit signed,Amy Huang2019-08-272-14/+24
| | | | | | 32 bit unsigned, and 64 bit pointers. llvm-svn: 370083
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