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| author | Justin Hibbits <chmeeedalf@gmail.com> | 2019-10-24 16:22:47 -0500 |
|---|---|---|
| committer | Justin Hibbits <chmeeedalf@gmail.com> | 2019-11-12 20:34:34 -0600 |
| commit | bc4bc5aa0d84413e4e3f082dee0d30cf839fb7ea (patch) | |
| tree | d1681751156d88a5d7a0a4051aaf66689c6ec5e0 /clang/lib/Basic | |
| parent | 9d7bccab663f5e71320fb10727abcfa6c2dab046 (diff) | |
| download | bcm5719-llvm-bc4bc5aa0d84413e4e3f082dee0d30cf839fb7ea.tar.gz bcm5719-llvm-bc4bc5aa0d84413e4e3f082dee0d30cf839fb7ea.zip | |
Add 8548 CPU definition and attributes
8548 CPU is GCC's name for the e500v2, so accept this in clang. The
e500v2 doesn't support lwsync, so define __NO_LWSYNC__ for this as well,
as GCC does.
Differential Revision: https://reviews.llvm.org/D67787
Diffstat (limited to 'clang/lib/Basic')
| -rw-r--r-- | clang/lib/Basic/Targets/PPC.cpp | 27 | ||||
| -rw-r--r-- | clang/lib/Basic/Targets/PPC.h | 4 |
2 files changed, 20 insertions, 11 deletions
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index a4099104887..baa96e21707 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -157,6 +157,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("_ARCH_A2Q"); Builder.defineMacro("_ARCH_QP"); } + if (ArchDefs & ArchDefineE500) + Builder.defineMacro("__NO_LWSYNC__"); if (getTriple().getVendor() == llvm::Triple::BGQ) { Builder.defineMacro("__bg__"); @@ -312,6 +314,11 @@ bool PPCTargetInfo::initFeatureMap( .Case("pwr8", true) .Default(false); + Features["spe"] = llvm::StringSwitch<bool>(CPU) + .Case("8548", true) + .Case("e500", true) + .Default(false); + if (!ppcUserFeaturesCheck(Diags, FeaturesVec)) return false; @@ -449,16 +456,16 @@ ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const { } static constexpr llvm::StringLiteral ValidCPUNames[] = { - {"generic"}, {"440"}, {"450"}, {"601"}, {"602"}, - {"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"}, - {"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"}, - {"7450"}, {"g4+"}, {"750"}, {"970"}, {"g5"}, - {"a2"}, {"a2q"}, {"e500mc"}, {"e5500"}, {"power3"}, - {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"}, {"pwr5"}, - {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"}, {"power6x"}, - {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"}, {"pwr8"}, - {"power9"}, {"pwr9"}, {"powerpc"}, {"ppc"}, {"powerpc64"}, - {"ppc64"}, {"powerpc64le"}, {"ppc64le"}, + {"generic"}, {"440"}, {"450"}, {"601"}, {"602"}, + {"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"}, + {"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"}, + {"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"}, + {"g5"}, {"a2"}, {"a2q"}, {"e500"}, {"e500mc"}, + {"e5500"}, {"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, + {"power5"}, {"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, + {"pwr6"}, {"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, + {"power8"}, {"pwr8"}, {"power9"}, {"pwr9"}, {"powerpc"}, + {"ppc"}, {"powerpc64"}, {"ppc64"}, {"powerpc64le"}, {"ppc64le"}, }; bool PPCTargetInfo::isValidCPUName(StringRef Name) const { diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index 6c6421c28e2..847338bbac1 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -44,7 +44,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo { ArchDefinePwr8 = 1 << 12, ArchDefinePwr9 = 1 << 13, ArchDefineA2 = 1 << 14, - ArchDefineA2q = 1 << 15 + ArchDefineA2q = 1 << 15, + ArchDefineE500 = 1 << 16 } ArchDefineTypes; @@ -145,6 +146,7 @@ public: ArchDefinePwr9 | ArchDefinePwr8 | ArchDefinePwr7 | ArchDefinePwr6 | ArchDefinePwr5x | ArchDefinePwr5 | ArchDefinePwr4 | ArchDefinePpcgr | ArchDefinePpcsq) + .Cases("8548", "e500", ArchDefineE500) .Default(ArchDefineNone); } return CPUKnown; |
