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talos-sbe
04-16-2019
07-25-2019
master
Blackbird™ SBE sources
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Author
Age
Files
Lines
*
p9.core.scan.initfile -- mask local error from CC in EC perv LFIR
Joe McGill
2017-01-24
1
-0
/
+17
*
VITAL cleaning for DD2
Anusha Reddy Rangareddygari
2017-01-24
3
-92
/
+29
*
p9_sbe_tp_chiplet_init3 -- disable TP TOD hang pulse
Joe McGill
2017-01-24
3
-3
/
+34
*
p9_sbe_attr_setup optimized
Anusha Reddy Rangareddygari
2017-01-24
1
-35
/
+13
*
p9_sbe_tp_chiplet_init1 optimized
Anusha Reddy Rangareddygari
2017-01-24
1
-26
/
+22
*
p9_pm_pstate_gpe_init Level 2
Greg Still
2017-01-24
1
-0
/
+32
*
FBC updates for HW383616, HW384245
Joe McGill
2017-01-24
2
-2
/
+36
*
Updating P9 L2 scan initfile to use attributes
Luke Murray
2017-01-24
1
-0
/
+34
*
Add constant for VPD #W keyword
Dan Crowell
2017-01-24
1
-0
/
+1
*
MPIPL Issue fixed - Called proc_sbe_select_ex in Continue Path
Raja Das
2017-01-23
1
-2
/
+5
*
Added Quad Power Management Mode Register Clear for Quad Power Hwp
Raja Das
2017-01-23
1
-1
/
+10
*
Adding chip_ec_feature attributes for dd2 build
Ben Gass
2017-01-22
1
-0
/
+1312
*
Adding skip group dials for cache when chip=group
Luke Murray
2017-01-22
2
-0
/
+54
*
Changing ttype to dma for MPIPL runs
CHRISTINA L. GRAVES
2017-01-22
1
-2
/
+13
*
Set plck as default mode in ATTR_BOOT_FLAGS
Santosh Puranik
2017-01-22
1
-1
/
+1
*
SBE fastarray chip-op
spashabk-in
2017-01-20
10
-7
/
+342
*
Initialise empty section of l1 loader
Sachin Gupta
2017-01-19
2
-4
/
+25
*
Revert "SBE fastarray chip-op"
Sachin Gupta
2017-01-19
10
-345
/
+7
*
istep 4: only use one EX even if both are good
Greg Still
2017-01-19
2
-20
/
+47
*
RTC 149074 Async Response of PSU operation from SBE
Sunil.Kumar
2017-01-19
7
-12
/
+57
*
Saving existing Cronus FIFO state in sbe-debug.py
spashabk-in
2017-01-19
1
-11
/
+19
*
SBE fastarray chip-op
spashabk-in
2017-01-19
10
-7
/
+345
*
PK: make GPE using 8B in64/out64 op
Yue Du
2017-01-18
1
-31
/
+0
*
MCS FIR updates
Joe McGill
2017-01-18
2
-5
/
+1
*
p9_sbe_startclock_chiplets optimized
Anusha Reddy Rangareddygari
2017-01-18
1
-146
/
+45
*
p9_sbe_chiplet_pll_setup optimized
Anusha Reddy Rangareddygari
2017-01-18
1
-162
/
+111
*
SGPE HWP : tune PFET controller polling
Amit Kumar
2017-01-17
1
-2
/
+7
*
p9_sbe_chiplet_reset -- drive PCIE PLL from SS filter PLL for DD1.x
Joe McGill
2017-01-17
2
-6
/
+32
*
PK stack checking
Doug Gilbert
2017-01-17
5
-9
/
+50
*
tpm reset support
Sachin Gupta
2017-01-17
1
-10
/
+72
*
add SS PLL settings to support 94 MHz PCI operation
Joe McGill
2017-01-16
1
-0
/
+18
*
Modify signature of p9_stopclocks
spashabk-in
2017-01-16
2
-70
/
+99
*
p9_stopclocks SBE/PPE related changes
spashabk-in
2017-01-16
4
-31
/
+205
*
Implementation of PIB stopclock with CBS
Soma BhanuTej
2017-01-16
4
-51
/
+231
*
Adding bool for cache/cores in the p9_stopclocks HWP
Soma BhanuTej
2017-01-16
2
-9
/
+25
*
Changing ATTR_PG from 32 to 16 bit
Anusha Reddy Rangareddygari
2017-01-16
1
-3
/
+3
*
Stopclock procedure updates
Soma BhanuTej
2017-01-16
4
-56
/
+110
*
Fixing a bug in stopclk cmn module - p9_common_stopclocks
Soma BhanuTej
2017-01-16
2
-3
/
+3
*
Fapi Implementation of Level2 HWP p9_stopclocks
Soma BhanuTej
2017-01-16
10
-19
/
+1060
*
Level 1 HWP for p9_stopclocks
Soma BhanuTej
2017-01-16
2
-0
/
+150
*
configure FBC pump mode in SBE
Joe McGill
2017-01-15
8
-118
/
+95
*
p9_getecid -- set PCIE DD1.0x workaround attributes
Joe McGill
2017-01-15
1
-0
/
+34
*
Add new core workarounds, defect inline in the initfile
Nick Klazynski
2017-01-13
1
-3
/
+3
*
Specialization of getParent for compound targets
Santosh Puranik
2017-01-12
3
-12
/
+70
*
Timer service
Sachin Gupta
2017-01-11
14
-7
/
+739
*
SW375288: Reads to C_RAS_MODEREG causes SPR corruption
Nick Klazynski
2017-01-11
1
-13
/
+19
*
Enabled Put/Get Scom traces
Raja Das
2017-01-11
1
-4
/
+7
*
Enable imprecise mode only for CME
Prasad Bg Ranganath
2017-01-10
1
-2
/
+0
*
Enable QUEUED SCAN in CME putring code
Prasad Bg Ranganath
2017-01-10
1
-1
/
+3
*
Update backing build
Sachin Gupta
2017-01-09
2
-25
/
+25
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