diff options
author | spashabk-in <shakeebbk@in.ibm.com> | 2016-11-22 04:29:40 -0600 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-01-20 04:51:33 -0500 |
commit | 159d553ca156d6c1fe1615dcf8304c6277bfb2df (patch) | |
tree | 24430d62b1e4308423bf053884346117beaa447c /src | |
parent | b975c978112d5fefef1f3e423886706ff205ff45 (diff) | |
download | talos-sbe-159d553ca156d6c1fe1615dcf8304c6277bfb2df.tar.gz talos-sbe-159d553ca156d6c1fe1615dcf8304c6277bfb2df.zip |
SBE fastarray chip-op
Change-Id: Iad89e5d7df919bf6862f008d8cdb2783f43e90ed
RTC:120758
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32939
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35092
Diffstat (limited to 'src')
-rw-r--r-- | src/sbefw/sbe_sp_intf.H | 15 | ||||
-rw-r--r-- | src/sbefw/sbecmdfastarray.C | 158 | ||||
-rw-r--r-- | src/sbefw/sbecmdfastarray.H | 51 | ||||
-rw-r--r-- | src/sbefw/sbecmdparser.C | 5 | ||||
-rw-r--r-- | src/sbefw/sbefapiutil.C | 4 | ||||
-rw-r--r-- | src/sbefw/sbefwfiles.mk | 1 | ||||
-rw-r--r-- | src/sbefw/sbeutil.H | 6 | ||||
-rwxr-xr-x | src/test/testcases/test.xml | 1 | ||||
-rw-r--r-- | src/test/testcases/testFastAccess.xml | 28 | ||||
-rw-r--r-- | src/test/testcases/testFastArray.py | 80 |
10 files changed, 342 insertions, 7 deletions
diff --git a/src/sbefw/sbe_sp_intf.H b/src/sbefw/sbe_sp_intf.H index 88b6d38e..08625277 100644 --- a/src/sbefw/sbe_sp_intf.H +++ b/src/sbefw/sbe_sp_intf.H @@ -136,7 +136,7 @@ enum sbeRegisterAccessCommands */ enum sbeArrayAccessCommands { - SBE_CMD_GET_FAST_ARRAY = 0x01, /* Get Fast Array */ + SBE_CMD_CONTROL_FAST_ARRAY = 0x01, /* Control Fast Array */ SBE_CMD_CONTROL_TRACE_ARRAY = 0x02, /* Control Trace Array */ }; @@ -267,7 +267,7 @@ enum PUT_SRAM_CME_SUPPPORTED = 0xA4000020, GET_REGISTER_SUPPPORTED = 0xA5000001, PUT_REGISTER_SUPPPORTED = 0xA5000002, - READ_FAST_ARRAY_SUPPPORTED = 0xA6000001, + CONTROL_FAST_ARRAY_SUPPPORTED = 0xA6000001, CONTROL_TRACE_ARRAY_SUPPPORTED = 0xA6000002, CONTROL_INSTRUCTIONS_SUPPPORTED = 0xA7000001, GET_SBE_FFDC_SUPPPORTED = 0xA8000001, @@ -411,6 +411,7 @@ typedef enum /// pulse SBE_RING_MODE_SET_PULSE_ALL = 0x0010, ///< Set pulse with pulse /// to all hold types + SBE_RING_MODE_FASTARRAY = 0x0020, //Fast array mode } sbeRingAccessModes_t; // Trace array chip-op operation bitmaps @@ -420,6 +421,16 @@ static const uint16_t SBE_TA_STOP = 0x0004; static const uint16_t SBE_TA_COLLECT_DUMP = 0x0008; static const uint16_t SBE_TA_IGNORE_MUX_SETTING = 0x0010; +/* + * @brief enums for fast array control mode + */ +typedef enum +{ + FASTARRAY_SETUP = 0x01, + FASTARRAY_SKIPCYCLES = 0x02, + FASTARRAY_CLEANUP = 0x03, +} sbeFastArrayControlModes_t; + #ifdef __cplusplus } #endif diff --git a/src/sbefw/sbecmdfastarray.C b/src/sbefw/sbecmdfastarray.C new file mode 100644 index 00000000..c60af7a9 --- /dev/null +++ b/src/sbefw/sbecmdfastarray.C @@ -0,0 +1,158 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/sbefw/sbecmdfastarray.C $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include "sbecmdfastarray.H" +#include "sbefifo.H" +#include "sbe_sp_intf.H" +#include "sbetrace.H" +#include "sbeFifoMsgUtils.H" +#include "sbeutil.H" +#include "sbefapiutil.H" +#include "fapi2.H" + +// TODO via RTC:120758 - Enable once fast array procedures are in ekb +/* +#include "p9_sbe_fastarray_setup.H" +#include "p9_sbe_fastarray_cleanup.H" +#include "p9_sbe_fastarray_abist_catchup.H" + +#ifdef SEEPROM_IMAGE +// Using Function pointer to force long call +p9_sbe_fastarray_setup_FP_t p9_sbe_fastarray_setup_hwp = + &p9_sbe_fastarray_setup; +p9_sbe_fastarray_cleanup_FP_t p9_sbe_fastarray_cleanup_hwp = + &p9_sbe_fastarray_cleanup; +p9_sbe_fastarray_abist_catchup_FP_t p9_sbe_fastarray_abist_catchup_hwp = + &p9_sbe_fastarray_abist_catchup; +#endif +*/ + +using namespace fapi2; + +uint32_t sbeControlFastArray(uint8_t *i_pArg) +{ + #define SBE_FUNC " sbeControlFastArray" + SBE_ENTER(SBE_FUNC); + uint32_t l_rc = SBE_SEC_OPERATION_SUCCESSFUL; + + sbeControlFastArrayCMD_t l_req = {}; + sbeRespGenHdr_t respHdr; + respHdr.init(); + sbeResponseFfdc_t l_ffdc; + ReturnCode l_fapiRc; + uint32_t l_len = 0; + + do + { + l_len = sizeof(sbeControlFastArrayCMD_t)/sizeof(uint32_t); + l_rc = sbeUpFifoDeq_mult (l_len, (uint32_t *)&l_req); //EOT fetch + + // If FIFO access failure + CHECK_SBE_RC_AND_BREAK_IF_NOT_SUCCESS(l_rc); + + SBE_INFO(SBE_FUNC" targetType [0x%04X] chipletId [0x%02X]", + static_cast<uint16_t>(l_req.targetType), + static_cast<uint8_t>(l_req.chipletId)); + // Construct a Target from Chiplet ID and Target Type + plat_target_handle_t l_tgtHndl; + if(!sbeGetFapiTargetHandle(l_req.targetType, l_req.chipletId, + l_tgtHndl)) + { + SBE_ERROR(SBE_FUNC "Invalid target - Type [0x%04x] Chiplet [0x%02X]", + static_cast<uint16_t>(l_req.targetType), + static_cast<uint8_t>(l_req.chipletId)); + respHdr.setStatus(SBE_PRI_INVALID_DATA, + SBE_SEC_INVALID_TARGET_TYPE_PASSED); + break; + } + + // Relevant only when mode is set up + uint64_t l_clock_regions = 0; + // Relevant only when mode is skip cycles + uint32_t l_clock_cycles = 0; + switch(l_req.mode) + { + case FASTARRAY_SETUP: + l_clock_regions = (MASK_ZERO_H32B_UINT64(l_req.hData) << 32)| + l_req.lData; + SBE_INFO(SBE_FUNC" setup:clockregion [0x%08X%08X]", + static_cast<uint32_t>(SBE::higher32BWord(l_clock_regions)), + static_cast<uint32_t>(SBE::lower32BWord(l_clock_regions))); + // TODO via RTC:120758 - Enable once fast array procedures are in ekb + /* + SBE_EXEC_HWP(l_fapiRc, + p9_sbe_fastarray_setup_hwp, + l_tgtHndl, + l_clock_regions); + */ + break; + case FASTARRAY_SKIPCYCLES: + l_clock_cycles = l_req.lData; + SBE_INFO(SBE_FUNC" abist catchup:skipcycles [0x%08X]", + static_cast<uint32_t>(l_clock_cycles)); + // TODO via RTC:120758 - Enable once fast array procedures are in ekb + /* + SBE_EXEC_HWP(l_fapiRc, + p9_sbe_fastarray_abist_catchup_hwp, + l_tgtHndl, + l_clock_cycles); + */ + break; + case FASTARRAY_CLEANUP: + SBE_INFO(SBE_FUNC" cleanup"); + // TODO via RTC:120758 - Enable once fast array procedures are in ekb + /* + SBE_EXEC_HWP(l_fapiRc, + p9_sbe_fastarray_cleanup_hwp, + l_tgtHndl); + */ + break; + } + if(l_fapiRc != FAPI2_RC_SUCCESS) + { + SBE_ERROR(SBE_FUNC" HWP failure:mode [0x%02X]", + static_cast<uint8_t>(l_req.mode)); + SBE_ERROR(SBE_FUNC" targetType [0x%04X] " + "chipletId [0x%02X] data[0-31] [0x%08X] " + "data[0-31] [0x%08X]", + static_cast<uint16_t>(l_req.targetType), + static_cast<uint8_t>(l_req.chipletId), + static_cast<uint32_t>(l_req.hData), + static_cast<uint32_t>(l_req.lData)); + l_ffdc.setRc(l_fapiRc); + } + + } while(false); + + // Now build and enqueue response into downstream FIFO + // If there was a FIFO error, will skip sending the response, + // instead give the control back to the command processor thread + if ( SBE_SEC_OPERATION_SUCCESSFUL == l_rc ) + { + l_rc = sbeDsSendRespHdr( respHdr, &l_ffdc); + } + SBE_EXIT(SBE_FUNC); + return l_rc; + #undef SBE_FUNC +} diff --git a/src/sbefw/sbecmdfastarray.H b/src/sbefw/sbecmdfastarray.H new file mode 100644 index 00000000..f498d5e8 --- /dev/null +++ b/src/sbefw/sbecmdfastarray.H @@ -0,0 +1,51 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/sbefw/sbecmdfastarray.H $ */ +/* */ +/* OpenPOWER sbe Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __SBE_CMDFASTARRAY_H +#define __SBE_CMDFASTARRAY_H + +#include <stdint.h> + +/* + * @brief Fast array command structure + * + * */ +typedef struct +{ + uint32_t targetType:16; + uint32_t chipletId:8; + uint32_t mode:8; + uint32_t hData; + uint32_t lData; +} sbeControlFastArrayCMD_t; + +/** + * @brief Control Fast Array Command (0xA601) + * + * @param[in] i_pArg Buffer to be passed to the function (not used as of now) + * + * @return RC from the FIFO access utility + */ +uint32_t sbeControlFastArray(uint8_t *i_pArg); + +#endif //__SBE_CMDFASTARRAY_H diff --git a/src/sbefw/sbecmdparser.C b/src/sbefw/sbecmdparser.C index 01b31e04..c608e911 100644 --- a/src/sbefw/sbecmdparser.C +++ b/src/sbefw/sbecmdparser.C @@ -49,6 +49,7 @@ #include "sbecmdmpipl.H" #include "sbecmdtracearray.H" #include "sbecmdCntrlTimer.H" +#include "sbecmdfastarray.H" // Declaration static const uint16_t HARDWARE_FENCED_STATE = @@ -224,8 +225,8 @@ static sbeCmdStruct_t g_sbeRingAccessCmdArray [] = //////////////////////////////////////////////////////////////// static sbeCmdStruct_t g_sbeArrayAccessCmdArray[] = { - {NULL, - SBE_CMD_GET_FAST_ARRAY, + {sbeControlFastArray, + SBE_CMD_CONTROL_FAST_ARRAY, SBE_FENCE_AT_QUIESCE, }, {sbeControlTraceArray, diff --git a/src/sbefw/sbefapiutil.C b/src/sbefw/sbefapiutil.C index 3d156a17..c2034595 100644 --- a/src/sbefw/sbefapiutil.C +++ b/src/sbefw/sbefapiutil.C @@ -90,6 +90,10 @@ uint16_t sbeToFapiRingMode(uint16_t i_ringMode) { l_fapiRingMode |= RING_MODE_SET_PULSE_ALL; } + if(i_ringMode & SBE_RING_MODE_FASTARRAY) + { + l_fapiRingMode |= RING_MODE_FASTARRAY; + } return l_fapiRingMode; } diff --git a/src/sbefw/sbefwfiles.mk b/src/sbefw/sbefwfiles.mk index 6fd29618..43b680ad 100644 --- a/src/sbefw/sbefwfiles.mk +++ b/src/sbefw/sbefwfiles.mk @@ -48,6 +48,7 @@ SBEFW-CPP-SOURCES += sbeutil.C SBEFW-CPP-SOURCES += sbecmdtracearray.C SBEFW-CPP-SOURCES += sbeTimerSvc.C SBEFW-CPP-SOURCES += sbecmdCntrlTimer.C +SBEFW-CPP-SOURCES += sbecmdfastarray.C SBEFW-C-SOURCES = SBEFW-S-SOURCES = diff --git a/src/sbefw/sbeutil.H b/src/sbefw/sbeutil.H index e572f6af..5dbd2a42 100644 --- a/src/sbefw/sbeutil.H +++ b/src/sbefw/sbeutil.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,8 +27,8 @@ #include "pk.h" #include "pk_api.h" -#define MASK_ZERO_L32B_UINT64(x) ((x) & 0xFFFFFFFF00000000) -#define MASK_ZERO_H32B_UINT64(x) ((x) & 0x00000000FFFFFFFF) +#define MASK_ZERO_L32B_UINT64(x) ((x) & 0xFFFFFFFF00000000ull) +#define MASK_ZERO_H32B_UINT64(x) ((x) & 0x00000000FFFFFFFFull) #define SHIFT_RIGHT(x, bits) ((x) >> bits) // Macros Defined for Internal RC Check, Break if Error diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml index 76d1998e..53366256 100755 --- a/src/test/testcases/test.xml +++ b/src/test/testcases/test.xml @@ -43,6 +43,7 @@ <include>../simics/targets/p9_nimbus/sbeTest/testExecutorPutRing.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testSystemFabricMap.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testArrayAccess.xml</include> + <include>../simics/targets/p9_nimbus/sbeTest/testFastAccess.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testGetRing.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testExecutorCntrlTimer.xml</include> <include>../simics/targets/p9_nimbus/sbeTest/testQuiesce.xml</include> diff --git a/src/test/testcases/testFastAccess.xml b/src/test/testcases/testFastAccess.xml new file mode 100644 index 00000000..00c8fe49 --- /dev/null +++ b/src/test/testcases/testFastAccess.xml @@ -0,0 +1,28 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/test/testcases/testFastAccess.xml $ --> +<!-- --> +<!-- OpenPOWER sbe Project --> +<!-- --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2017 --> +<!-- --> +<!-- --> +<!-- Licensed under the Apache License, Version 2.0 (the "License"); --> +<!-- you may not use this file except in compliance with the License. --> +<!-- You may obtain a copy of the License at --> +<!-- --> +<!-- http://www.apache.org/licenses/LICENSE-2.0 --> +<!-- --> +<!-- Unless required by applicable law or agreed to in writing, software --> +<!-- distributed under the License is distributed on an "AS IS" BASIS, --> +<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or --> +<!-- implied. See the License for the specific language governing --> +<!-- permissions and limitations under the License. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- Control Trace Array Test case --> +<testcase> + <simcmd>run-python-file targets/p9_nimbus/sbeTest/testFastArray.py</simcmd> + <exitonerror>yes</exitonerror> +</testcase> diff --git a/src/test/testcases/testFastArray.py b/src/test/testcases/testFastArray.py new file mode 100644 index 00000000..69c062e6 --- /dev/null +++ b/src/test/testcases/testFastArray.py @@ -0,0 +1,80 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/test/testcases/testFastArray.py $ +# +# OpenPOWER sbe Project +# +# Contributors Listed Below - COPYRIGHT 2016,2017 +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +import sys +sys.path.append("targets/p9_nimbus/sbeTest" ) +import testUtil +err = False + +CONTROL_FAST_ARRAY_SETUP_TESTDATA = [0, 0, 0, 0x05, + 0, 0, 0xA6, 0x01, + 0, 0x02, 0x20, 0x01, #PERV, 0x20 - Core chiplet, setup + 0x12, 0x34, 0x56, 0x78, #data[0-31] + 0x9a, 0xbc, 0xde, 0xf0] #data[32-63] +CONTROL_FAST_ARRAY_CATCHUP_TESTDATA= [0, 0, 0, 0x05, + 0, 0, 0xA6, 0x01, + 0, 0x02, 0x20, 0x02, #PERV, 0x20 - Core chiplet, catchup + 0x00, 0x00, 0x00, 0x00, #data[0-31] + 0x00, 0x00, 0x00, 0x01] #data[32-63] +CONTROL_FAST_ARRAY_CLEANUP_TESTDATA = [0, 0, 0, 0x05, + 0, 0, 0xA6, 0x01, + 0, 0x02, 0x20, 0x03, #PERV, 0x20 - Core chiplet, cleanup + 0x12, 0x34, 0x56, 0x78, #dont care + 0x9a, 0xbc, 0xde, 0xf0] #dont care + +CONTROL_FAST_ARRAY_VALID = [0xC0, 0xDE, 0xA6, 0x01, + 0, 0, 0, 0, + 0, 0, 0, 0x03] + +# MAIN Test Run Starts Here... +#------------------------------------------------- +def main( ): + testUtil.runCycles( 10000000 ) + print ("\nStarting control fastarray test") + print ("\nTest case: Setup") + testUtil.writeUsFifo( CONTROL_FAST_ARRAY_SETUP_TESTDATA) + testUtil.writeEot( ) + testUtil.readDsFifo( CONTROL_FAST_ARRAY_VALID) + testUtil.readEot( ) + print ("\nTest case: Catchup") + testUtil.writeUsFifo(CONTROL_FAST_ARRAY_CATCHUP_TESTDATA) + testUtil.writeEot( ) + testUtil.readDsFifo( CONTROL_FAST_ARRAY_VALID) + testUtil.readEot( ) + print ("\nTest case: Cleanup") + testUtil.writeUsFifo( CONTROL_FAST_ARRAY_CLEANUP_TESTDATA) + testUtil.writeEot( ) + testUtil.readDsFifo( CONTROL_FAST_ARRAY_VALID) + testUtil.readEot( ) + +#------------------------------------------------- +# Calling all test code +#------------------------------------------------- +main() + +if err: + print ("\nTest Suite completed with error(s)") + #sys.exit(1) +else: + print ("\nTest Suite completed with no errors") + #sys.exit(0); |