index
:
talos-sbe
04-16-2019
07-25-2019
master
Blackbird™ SBE sources
Raptor Computing Systems
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
import
/
chips
/
p9
/
procedures
/
hwp
/
core
Commit message (
Expand
)
Author
Age
Files
Lines
*
PM Level 3 for multiple procedures
Amit Kumar
2017-09-20
1
-1
/
+0
*
Synchronous stopclk procedure for Quad
Soma BhanuTej
2017-08-16
2
-29
/
+45
*
L3 Update - p9_thread_control HWP
Thi Tran
2017-08-07
2
-245
/
+195
*
Istep4: procedures upgrade to level3
Yue Du
2017-07-20
26
-325
/
+222
*
updates for thread control, ramming with STOP enabled
Joe McGill
2017-07-19
1
-64
/
+33
*
PM: Delete deprecated attributes
Greg Still
2017-07-14
1
-4
/
+4
*
L3 update -- p9_sbe_instruct_start
Thi Tran
2017-06-23
2
-12
/
+11
*
Pstate: Remove legacy VDM code
Christopher M. Riedl
2017-05-12
2
-10
/
+3
*
IPL: Add global checkstop FIR check in Istep4
Yue Du
2017-04-28
1
-14
/
+34
*
Include p9_ring_id.h or p9_ringId.H
Kahn Evans
2017-03-23
1
-0
/
+1
*
Inclusion of p9_ring_id.h
Kahn Evans
2017-03-21
1
-0
/
+1
*
Core Init additions to put ABIST engines in parallel mode for Nimbus DD1.0
Thi Tran
2017-03-21
1
-2
/
+22
*
IPL Only: Drop chiplet fence in scomcust instead of startclocks
Yue Du
2017-03-03
3
-45
/
+39
*
IPL/Stop: Assert ABIST_SRAM_MODE_DC to support ABIST Recovery
Yue Du
2017-02-28
2
-0
/
+8
*
HW399609: DD1 changing core/nest hang limit or hang pulse divider
Yue Du
2017-02-24
1
-11
/
+44
*
p9_thread_control poll more than once for thread running.
Ben Gass
2017-02-24
1
-3
/
+10
*
Revert "Hcode: Drop chiplet fence after scominit and scomcust hwp."
YUE DU
2017-02-09
3
-33
/
+44
*
Hcode: Drop chiplet fence after scominit and scomcust hwp.
Yue Du
2017-02-06
3
-46
/
+35
*
Istep4: clean up istep4 todo items and mark them with RTC
Yue Du
2017-01-31
8
-32
/
+32
*
SW375288: Reads to C_RAS_MODEREG causes SPR corruption
Nick Klazynski
2017-01-11
1
-13
/
+19
*
HCODE: Drop TLBIE Quiesce after initfile scan it to 1
Yue Du
2016-12-20
1
-2
/
+2
*
update core internal/external hang timeouts
Joe McGill
2016-12-20
1
-0
/
+11
*
Istep4: Shouldn't set group_id in cache-contained mode
Yue Du
2016-12-20
1
-7
/
+11
*
STOP Image updates
Yue Du
2016-11-21
2
-5
/
+7
*
Istep4: Enable poll for DPLL lock in p9_hcd_cache_dpll_setup
Yue Du
2016-11-21
4
-19
/
+37
*
Thread Control Stop precedure update
Raja Das
2016-10-28
1
-47
/
+60
*
p9_hcd_core_startclocks -- set CPLT_CONF0 system/group/chip ID fields
Joe McGill
2016-10-26
1
-0
/
+19
*
Istep4: add enable auto special wakeup after core is up
Yue Du
2016-10-26
1
-0
/
+6
*
cache/core/l2_stopclocks updates
Yue Du
2016-10-26
1
-24
/
+89
*
Cleaned old makefiles
Sachin Gupta
2016-10-15
2
-115
/
+0
*
HW390253: change core scan ratio to 2:1 as clock controller is 2:1
Yue Du
2016-10-14
1
-2
/
+5
*
Stop Clocks for MPIPL (Core & Cache(EQ))
Raja Das
2016-10-06
1
-0
/
+1
*
Core/Initfile: remove cache contained condtions on core-cc/l2 quiesces
Yue Du
2016-10-06
1
-2
/
+1
*
Interrupts must be blocked the entire time the thread is stopped.
Nick Klazynski
2016-10-05
2
-32
/
+44
*
SBE Quiesce Implementation for FIFO/PSU
Raja Das
2016-09-30
1
-2
/
+5
*
move C_PPM_SSHSRC setup from p9_hcd_core_scominit to p9_hcd_core_startclocks
Joe McGill
2016-09-22
2
-3
/
+6
*
Changing ATTR_PG from 32 to 16 bit
Anusha Reddy Rangareddygari
2016-09-21
1
-8
/
+2
*
CORE/CACHE: core/cache/l2_stopclocks Level 2
Yue Du
2016-09-20
1
-1
/
+133
*
CORE/CACHE: add Level1 cache/l2/core stopclocks procedures
Yue Du
2016-09-20
2
-0
/
+126
*
Update file headers
Sachin Gupta
2016-09-16
31
-31
/
+31
*
p9_hcd_core_scominit -- invoke p9.core.scom.initfile
Joe McGill
2016-09-11
1
-1
/
+13
*
core_chiplet_reset: SCAN_RATIO set according to ATTR_DPLL_BYPASS: 0=4:1, 1=1:1
Joe Dery
2016-09-08
1
-1
/
+21
*
SBE move import`
Shakeeb
2016-09-01
33
-0
/
+3541