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* PGPE: STOP11+WOF+SafeMode FixesRahul Batra2018-02-015-15/+61
| | | | | | | | | | | | | | | | | | | | | -STOP11+WOF Fix -STOP11+WOF+Safe Mode Key_Cronus_Test=PM_REGRESS Change-Id: I7b517b5722e13975a2b8a67544d50caa33fc4d92 Original-Change-Id: I7aae651213174049fa4fe89d6ac92fda2478e90a CQ: SW410652 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48989 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Remove redundant chiplet fence drop and adding sync in exitYue Du2018-02-011-18/+0
| | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ic1bdafc788876c7f6e0a413847d61bc1d2c3b5b1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48738 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PM: PMSR Update FixesRahul Batra2018-02-018-66/+100
| | | | | | | | | | | | | | | | | | | | -Removed any direct PMSR writes by PGPE -Fixed Clip Bcast ack during cme registration -Moved pmsr_updt from resclk to stop exit -Added Safe Mode DB0 Key_Cronus_Test=PM_REGRESS Change-Id: Ia3fef97944d6903504b99089d51049419ad44d1b Original-Change-Id: I4ba0372621a93242346f84e68db505a797155a2f CQ: SW407261 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49324 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Cache/Core stop clocks: add shut down of Power Management to remove contentionsAmit Tendolkar2018-02-012-31/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ported changes from https://ralgit01.raleigh.ibm.com/gerrit1/#/c/44781/25 to simplify auto mirror conflicts and reuse existing SBE HWP files - Halt SGPE, PGPE and CMEs assocatiated within the targeted EQ - Clear the PCB atomic lock that may be in place by SGPE - Add core stopclocks changes - Fixed cache stop clocks XML callout - Fix atomic lock library dependencies - Only enable function on DD2 - Halt PPE only if not already in halt - Enhance PPE Halt FFDC Key_Cronus_Test=PM_REGRESS Change-Id: Id6c11176d222213bf1a01b91cade41de989f04c6 RTC: 180317 CQ: SW406569 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50415 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Update STOP History with Stop8 for Srr1 state loss reportingYue Du2018-02-011-6/+0
| | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ideac6dfc1073b3be588e43a061db1a467b87d54c CQ: SW408732 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52734 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Stuart Z. Jacobs <sjacobs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Fix PLS deepest when stop4+ due to self restore wakeupYue Du2018-02-011-7/+236
| | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Iaf4e438dd0ac02fa1cb17628942d42814ccc71b8 Original-Change-Id: I4cc1e50a848d627f0ec3917bb8ebd39f20dc9466 CQ: HW420338 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51719 Reviewed-by: YUE DU <daviddu@us.ibm.com> Dev-Ready: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: VDM Prolonged Droop FixRahul Batra2018-02-012-3/+13
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ic8b16aa1b2aa81dc8c4f4e9ed76bdbd471b09770 Original-Change-Id: I73d38d6029a5b84590d1081855e12c145a535869 CQ: SW413192 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51338 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PGPE: Pmax > Psafe checkRahul Batra2018-02-011-1/+1
| | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I55f51e679628ed7554ace7ef5cba72026af299b9 CQ: SW411729 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51988 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PGPE: Intermittent Local Pstate Rollback FixRahul Batra2018-02-011-1/+1
| | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I4b49f1254328b8286754ad0140a5d22e920751a5 CQ: SW414108 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52005 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PGPE: Fix FIT and actuation step conflictRahul Batra2018-02-012-11/+9
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I5e6fd78adb40480d43e273018548cccd7d006f02 Original-Change-Id: I8cf51a4e044c70871c5f74a5d3a6ecfe64dafd47 CQ: SW411044 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50779 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP/PState: SGPE/PGPE Error Handling SupportYue Du2018-02-016-31/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upon PGPE Halt 1) SGPE performs STOP Recovery Trigger to set a malfunction alert and removes PGPE IPCs from wake-up decisions. 2) CME is interrupted by QPPM OCC Heartbeat Lost that PGPE stopped updating Upon SGPE Halt 1) PGPE moves to Psafe 2) PGPE performs STOP Recovery Trigger to set a malfunction alert. This commit also includes SGPE Panic Code Cleanup such as debug halt support. However PGPE Panic Code Cleanup is dealt in a different commit Key_Cronus_Test=PM_REGRESS Change-Id: Iffedd872b3e417ad0bbe937bcb130801ec119d92 Original-Change-Id: I893aa1ef21d2f684722b8c10dbbeb92b9505c1c4 CQ: SW410252 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49275 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* WOF: More Phase 2 FixesRahul Batra2018-02-012-1/+16
| | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I09ffafa56bb7ed6357af3007396952b493c1deb0 Original-Change-Id: Iba2ff6ffc0c2b06b3d2df1c40f707da63eb020b0 CQ: SW404912 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46595 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PGPE: STOP11+WOF+SafeMode FixesRahul Batra2018-02-015-9/+17
| | | | | | | | | | | | | | | | | | | | | -STOP11+WOF Fix -STOP11+WOF+Safe Mode Key_Cronus_Test=PM_REGRESS Change-Id: I3e7200acc3cf82d80394aa012b0112c8e831c1ff Original-Change-Id: I7aae651213174049fa4fe89d6ac92fda2478e90a CQ: SW410652 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48989 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: PMSR Update FixesRahul Batra2018-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | -Removed any direct PMSR writes by PGPE -Fixed Clip Bcast ack during cme registration -Moved pmsr_updt from resclk to stop exit -Added Safe Mode DB0 Key_Cronus_Test=PM_REGRESS Change-Id: I57d5a92c4e2f3301a3611ff0edbfd44077725afa Original-Change-Id: I4ba0372621a93242346f84e68db505a797155a2f CQ: SW407261 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49324 Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Hcode Injection: Adds hcode error injection capability.Prem Shanker Jha2018-02-0111-17/+76
| | | | | | | | | | | | | | | | | | | Commit adds error injection capability in the hcode of CME, SGPE and PGPE. - CME reads CSAR[30|31] and if asserted traps - SGPE reads OCC Flag2[30] and if asserted traps - PGPE reads OCC Flag2[31] and if asserted traps Change-Id: I4b579e521ec68c8aee624f3955b095b55d8bfdde Original-Change-Id: Ia8476076ce4953ced4eda30927bd891481b0373c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48920 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Moving DD specific ring coord from TOR to XIP (step 1)Sumit Kumar2018-02-014-84/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | | Step 1 - Ensuring backwards compatibility in TOR and XIP APIs to avoid co-req issue. - Updated TOR and XIP APIs, xip_tool and ipl_build to handle both types of DD coordination. Key_Cronus_Test=XIP_REGRESS HW-Image-Prereq=51511 - 51511 changes the .rings section DD level packaging. This commit (42751) prepares the TOR API and associated codes to handle the new .rings layout while also making the TOR API backwards compatible to the existing .rings section. Change-Id: I7d254340808ca9270fc1c96414102794fcffeabe Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42751 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* xip_customize and TOR API: Improved DD level verificationClaus Michael Olsen2018-02-013-12/+22
| | | | | | | | | | | | | | | | | | | | | | | This update propagates the extracted EC level in xip_customize through to the TOR API via the call to tor_get_single_ring(). The TOR API has been updated to verify that the requested DD level matches matches the DD level in the TOR header of the supplied ring section which, in the case of xip_customize, is an .overlays ring section. Key_Cronus_Test=XIP_REGRESS Change-Id: Ic087c269306acc0afcb8c759fe68eac63ae93d29 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51339 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* apply rings from Centaur HW imageJoe McGill2018-02-012-8/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cen_ringId.CH cen_ring_id.h add entries to hold multiple PLL rings, 8 in total cen_initf.C cen_pll_initf.C cen_pll_initf_errors.xml replace invocation of generated initfile HWP with putRing API calls (rings to be scanned gleamed from p8 cen assembly source) select correct PLL ring image based on NEST,MEM frequency cen_bucketX.txt define frequency points for each PLL bucket 1 = 2000 MHz NEST, 1066 MHz MEM 2 = 2000 MHz NEST, 1333 MHz MEM 3 = 2000 MHz NEST, 1600 MHz MEM 4 = 2000 MHz NEST, 1866 MHz MEM 5 = 2400 MHz NEST, 1066 MHz MEM 6 = 2400 MHz NEST, 1333 MHz MEM 7 = 2400 MHz NEST, 1600 MHz MEM 8 = 2400 MHz NEST, 1866 MHz MEM ipl_base.txt ipl_risk.txt remove frequency attributes from base attribute files scan_procedures.mk add rules to generate PLL buckets Change-Id: I8aee5e82337800ea9afe9a9af12d8d34f6e1e01e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50475 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
* Adding CT_P9A to the enum list of chip types.Claus Michael Olsen2018-02-011-4/+5
| | | | | | | | | | | | | | | | | | I inserted P9A before CT_CEN for purely estaetic reasons. Since the current Centaur image in EKB isn't being used yet, this should be safe (as otherwise there would be a co-req situation). Change-Id: Ia5ef9950644eacea3fdc28a0195502bdcae44327 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50812 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Revert "Adding p9a support."Jennifer A. Stofer2018-02-011-3/+1
| | | | | | | | | | | | This reverts commit 41352b2d444e98639eedc06b1eb0d8da89d4adb3. Change-Id: Ic3f2099eff3f5c942ef8fb6916e8ee78ca1a9e82 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50703 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Adding p9a support.Ben Gass2018-02-011-1/+3
| | | | | | | | | | | | | | | | | Adding CTEPERLPATH to ENV-setup Jenkins failure CQ SW40996 Change-Id: I02a9c5f31fb0545e8f8c8cd99b528a467ae52cf8 CQ: SW409966 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45266 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Override filter ring support for perv_pll_bndy_bucket rings.Claus Michael Olsen2018-02-013-4/+21
| | | | | | | | | | | | | Change-Id: If1d4649da6da3c0d9e09ef4169d4181a1dc43bde Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49438 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Code restruct: TOR APIClaus Michael Olsen2018-02-0111-1592/+527
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=XIP_REGRESS Code restructuring aiming at: - utilizing TOR magic header info - enforce a common approach for - extracting metadata for all image,chipType combinations - traversing images for all image,chipType combinations - shrinking code size by reusing common code segments - improve readability by - separating more clearly metadata extraction and image traversal - slight rearrange of certain code segments - remove leftover hardcoded assumptions about ring/TOR data and structs - variables appropriately renamed and now all using camel style Change-Id: I50ace8b2fdb340a97ce6d74ce545c5e1acd21c40 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38863 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: GIRISANKAR PAULRAJ <gpaulraj@in.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* p9_xip_tool support for DD level section parsingRichard J. Knight2018-02-012-142/+346
| | | | | | | | | | | | | | | | | | | | | | | | | | - Currently supports only .overlays section. - Fixed an heap problem causing segmentation fault after repetitive use of malloc in rs4_decompress() and rs4_extract_cmsk(). Now allocating buffers locally and calling _rs4_decompress() and _rs4_extract_cmsk() instead so only have to use malloc once. - Fixed a bug in the usage of the ringBlockPtr which got moved away from pointing to its initially allocated buffer after the first CMSK ring is processed. - Even though malloc() can be used in a C++ context, we really should be using the new() operator. So, I replaced all malloc() and free() with new() and delete() instead in both p9_xip_tool.C and p9_scan_compression.C. Change-Id: I2da7509ed7aaa13345185dc07bce57f71c3740fd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42531 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Move PGPE optrace buffer to main memoryAdam Hale2018-02-011-0/+1
| | | | | | | | | | | Change-Id: I519a843e45f1526ac4cc309af5d03693b075fcf8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46169 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Expand PGPE optrace to Main Mem - No fnctl coreq rqmt image build vs hcodeAdam Hale2018-02-011-0/+4
| | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I2a9dc3aea9992daac6bd3e1a2bf40cc8d38a4dbf Original-Change-Id: I823b350ffe1e07108fbadd4b0456c7188839932f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46480 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* SCOM Restore: Increased the EQ SCOM restore limit.Prem Shanker Jha2018-02-011-1/+16
| | | | | | | | | | | | | | | | Commit increases the SCOM restore limit from 16 to 31. HW-Image-Prereq: I781b0862dc983001574ba5f09a84ea0a2f7f781f HW-ImageBuild-Prereq: I43e7e067b59513db1c99ce913009a9a3ef5de90b CQ:HW423686 Change-Id: Ied6c919ff88870cd71319854a2b6aebbcc591af1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49055 Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Adding attribute to turn memory early data onLuke C. Murray2018-02-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Performance wants a way to turn memory early data on & off using just scoms. Adding one attribute to control all the needed scoms and defaulting everything so that early data is off. For the L3 disable cp_me by default using scom Changing the scom cp_me dial to disable cp_me for all systems after Nimbus DD2.0. This is expected to be the correct setup for most systems. We didn't disable the cp_me at the scan, because the scom can only disable cp_me if ON or allow the scan setting if set OFF. Some systems might want cp_me enabled by only changing a scom. So the default is to set cp_me on at the scan and off a the scom. This way only the scom has to be turned off to enable cp_me. Also update three scoms in the memory controler that are needed for early data. Change-Id: Id2f63c18cba6a3438bd58ecbd5e245c4b612dab7 Original-Change-Id: Ib2106ec4b7d26cb084601f2d6eee68833b36d30b CQ: HW426419 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49261 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Fix PLS deepest when stop4+ due to self restore wakeupYue Du2018-02-012-10/+19
| | | | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I567bc1b8223088c13f1587b54d60b4525a582e45 Original-Change-Id: I4cc1e50a848d627f0ec3917bb8ebd39f20dc9466 CQ: HW420338 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51719 Reviewed-by: YUE DU <daviddu@us.ibm.com> Dev-Ready: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: VDM Prolonged Droop FixRahul Batra2018-02-012-9/+10
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I5ac28ca22b7ff988591a5ca7ffb2a581b8fea706 Original-Change-Id: I73d38d6029a5b84590d1081855e12c145a535869 CQ: SW413192 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51338 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP/PState: SGPE/PGPE Error Handling SupportYue Du2018-02-013-3/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upon PGPE Halt 1) SGPE performs STOP Recovery Trigger to set a malfunction alert and removes PGPE IPCs from wake-up decisions. 2) CME is interrupted by QPPM OCC Heartbeat Lost that PGPE stopped updating Upon SGPE Halt 1) PGPE moves to Psafe 2) PGPE performs STOP Recovery Trigger to set a malfunction alert. This commit also includes SGPE Panic Code Cleanup such as debug halt support. However PGPE Panic Code Cleanup is dealt in a different commit Key_Cronus_Test=PM_REGRESS Change-Id: I1f6240d0ef294cb40126af27c46a78709f5ab201 Original-Change-Id: I893aa1ef21d2f684722b8c10dbbeb92b9505c1c4 CQ: SW410252 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49275 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Expand PGPE optrace to Main Mem - No fnctl coreq rqmt image build vs hcodeAdam Hale2018-02-011-0/+2
| | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I183d6b7bb023d694d076fb4931333a341d6d997c Original-Change-Id: I823b350ffe1e07108fbadd4b0456c7188839932f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46480 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PGPE: STOP11+WOF+SafeMode FixesRahul Batra2018-02-011-1/+1
| | | | | | | | | | | | | | | | | | | | | -STOP11+WOF Fix -STOP11+WOF+Safe Mode Key_Cronus_Test=PM_REGRESS Change-Id: I4cdecd7cfd7aa42b5c868fb78c929706f1eebdd5 Original-Change-Id: I7aae651213174049fa4fe89d6ac92fda2478e90a CQ: SW410652 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48989 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: Remove IOTA Decrementer SupportYue Du2018-02-011-2/+2
| | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I5386738638d1de5adba853670568ce942d6ef099 Original-Change-Id: I3ea633d0359b523fb7ac37222170dab7de1ab38c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50476 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Use HCode header timebase frequency for pk traceDoug Gilbert2018-02-0110-29/+70
| | | | | | | | | | | | | | | Change-Id: Id873da7ccb96192eb69e4aa5cff60ad33c713024 Original-Change-Id: I34a9d8d1a003ae6b07b50039a9ea57ff9fd5af4d RTC: 179852 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46227 Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* Expand PGPE optrace to Main Mem - No fnctl coreq rqmt image build vs hcodeAdam Hale2018-02-011-0/+6
| | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I48fe68baf58201fecf5dba7e4167b281fa2ddcfc Original-Change-Id: I823b350ffe1e07108fbadd4b0456c7188839932f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46480 Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Chip address extension workaround for HW423589 (option2), part1Joe McGill2018-02-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip_ec_attributes.xml nest_attributes.xml p9_sbe_attributes.xml add ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE, defines set of chips which physically support the feature add ATTR_CHIP_EC_FEATURE_HW423589_OPTION2, defines set of chips which need extended address workaround for MCD issue (applied only to Nimbus EC 21) add ATTR_MAX_INTERLEAVE_GROUP_SIZE, to restrict maximum size of memory groups formed. Written by p9_mss_eff_grouping. For HW423589_OPTION2, this will default to 512GB add ATTR_FABRIC_ADDR_EXTENSION_[GROUP|CHIP]_ID, to hold extended address configuration. Written by p9_sbe_fabricinit (SBE) and p9_mss_eff_grouping (HB). For HW423589_OPTION2, this will default to 0b0000_111, consuming all chip ID bits for extended addressing. p9_fbc_utils.C p9_fbc_utils.H extend p9_fbc_utils_get_chip_base_address to support address extension, now outputs set of ranges in each msel based on ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID maintain original function for PPE platform which requires knowledge of non-aliased base addresses only, for code size p9_mss_eff_grouping.C p9_mss_eff_grouping_errors.xml set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for HB platform restrict size of groups formed for HW423589_OPTION2 p9_sbe_fabricinit.C set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for SBE platform configure FBC/NMMU extended addressing registers p9_setup_bars.C p9_setup_bars_defs.H p9_setup_bars_errors.xml add general purpose support for extended address mode for HW423589_OPTION2, configure static MCD setup p9_hcode_image_defines.H p9_hcode_image_build.C customize SGPE image with address extension configuration to apply p9.cxa.scom.initfile p9.int.scom.initfile p9.l2.scom.initfile p9.l3.scom.initfile p9.ncu.scom.initfile p9.nx.scom.initfile p9.trace.scan.initfile p9.vas.scom.initfile p9_hcd_cache_scominit.C p9_hcd_cache_scominit.c p9_pcie_config.C set unit address extension configuration on supported chips p9_rng_init_phase2.C p9_sbe_scominit.C p9c_set_inband_addr.C p9_sbe_load_bootloader.C p9_sbe_mcs_setup.C adapt to alterations in p9_fbc_utils_get_chip_base_address Change-Id: I1d57fa11447a901390ded85b5a1cdecf7e2049cf Original-Change-Id: I614d566c073f1169f04f647057e6e85889f1c237 CQ: HW423589 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48576 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* disable ECC bypass for Cumulus DD1.0Joe McGill2018-02-011-0/+5
| | | | | | | | | | | | | | | | | | Nimbus DD2.0 disable will go into op910 only (for Boston Coral) but not into master Change-Id: I28376316be3e6700af97df83a02c48e46d715dec CQ: HW415945 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50445 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Increase cache data timeout valuesLuke C. Murray2018-02-011-3/+6
| | | | | | | | | | | | | | | | | | | | | The PCIe timeout have increased to 66-100ms, so we need to double the NCU master timeouts to be above these timeouts. This has a chain effect causing the L2/L3 master timeouts to increase which causes the tlbie snooper to increase which causes the tlbie master to increase. This would also ususally cause the core timeout to increas, but the core is already at around 13 seconds, so there is headroom there. Change-Id: I5930076151267a9bfa66e24edef0985c165db0b7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50582 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Turning on NCU tlbie pacing by defaultYue Du2018-02-011-1/+19
| | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Based on Commit 48817 Change-Id: Id003f4acb7c4084e791ce9d71ea776f7c1a3227a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50339 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Dev-Ready: YUE DU <daviddu@us.ibm.com> Reviewed-by: LUKE MURRAY <murrayl@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Adding attribute to turn memory early data onLuke C. Murray2018-02-011-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Performance wants a way to turn memory early data on & off using just scoms. Adding one attribute to control all the needed scoms and defaulting everything so that early data is off. For the L3 disable cp_me by default using scom Changing the scom cp_me dial to disable cp_me for all systems after Nimbus DD2.0. This is expected to be the correct setup for most systems. We didn't disable the cp_me at the scan, because the scom can only disable cp_me if ON or allow the scan setting if set OFF. Some systems might want cp_me enabled by only changing a scom. So the default is to set cp_me on at the scan and off a the scom. This way only the scom has to be turned off to enable cp_me. Also update three scoms in the memory controler that are needed for early data. Change-Id: Ib2106ec4b7d26cb084601f2d6eee68833b36d30b CQ: HW426419 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49261 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Chip address extension workaround for HW423589 (option2), part1Joe McGill2018-02-011-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | chip_ec_attributes.xml nest_attributes.xml p9_sbe_attributes.xml add ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE, defines set of chips which physically support the feature add ATTR_CHIP_EC_FEATURE_HW423589_OPTION2, defines set of chips which need extended address workaround for MCD issue (applied only to Nimbus EC 21) add ATTR_MAX_INTERLEAVE_GROUP_SIZE, to restrict maximum size of memory groups formed. Written by p9_mss_eff_grouping. For HW423589_OPTION2, this will default to 512GB add ATTR_FABRIC_ADDR_EXTENSION_[GROUP|CHIP]_ID, to hold extended address configuration. Written by p9_sbe_fabricinit (SBE) and p9_mss_eff_grouping (HB). For HW423589_OPTION2, this will default to 0b0000_111, consuming all chip ID bits for extended addressing. p9_fbc_utils.C p9_fbc_utils.H extend p9_fbc_utils_get_chip_base_address to support address extension, now outputs set of ranges in each msel based on ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID maintain original function for PPE platform which requires knowledge of non-aliased base addresses only, for code size p9_mss_eff_grouping.C p9_mss_eff_grouping_errors.xml set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for HB platform restrict size of groups formed for HW423589_OPTION2 p9_sbe_fabricinit.C set ATTR_FABRIC_ADDR_EXTENSION[GROUP|CHIP]_ID for SBE platform configure FBC/NMMU extended addressing registers p9_setup_bars.C p9_setup_bars_defs.H p9_setup_bars_errors.xml add general purpose support for extended address mode for HW423589_OPTION2, configure static MCD setup p9_hcode_image_defines.H p9_hcode_image_build.C customize SGPE image with address extension configuration to apply p9.cxa.scom.initfile p9.int.scom.initfile p9.l2.scom.initfile p9.l3.scom.initfile p9.ncu.scom.initfile p9.nx.scom.initfile p9.trace.scan.initfile p9.vas.scom.initfile p9_hcd_cache_scominit.C p9_hcd_cache_scominit.c p9_pcie_config.C set unit address extension configuration on supported chips p9_rng_init_phase2.C p9_sbe_scominit.C p9c_set_inband_addr.C p9_sbe_load_bootloader.C p9_sbe_mcs_setup.C adapt to alterations in p9_fbc_utils_get_chip_base_address Change-Id: I614d566c073f1169f04f647057e6e85889f1c237 CQ: HW423589 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48576 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: EX deconfigure masking for EQ chiplet FIRYue Du2018-02-011-3/+11
| | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ic45ae6aeca6158db12d9512eca0d23ee28a44763 Original-Change-Id: Ib5ec8e5b201631f264e4dba42f4bd387164664fa CQ: SW408926 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50147 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Support for PPE commit 49883 to error out on non-TOR ring section.Claus Michael Olsen2018-02-011-1/+4
| | | | | | | | | | | | | Change-Id: I7912c20e865aafe28c894bad98e4fbc3156d59ce Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50107 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* fapi2: Fix template call sites for GCC 7Joel Stanley2018-02-011-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following errors stop hostboot from building with modern GCC: src/import/hwpf/fapi2/include/buffer.H:710:23: error: invalid operands of types ‘<unresolved overloaded function type>’ and ‘fapi2::bufferTraits<long unsigned int, unsigned int>::bits_type {aka unsigned int}’ to binary ‘operator<’ out.insert<TS, L, SS>(iv_data); ~~~~~~~~~~^~~ src/import/hwpf/fapi2/include/buffer.H: In member function ‘fapi2::buffer<T, TT>& fapi2::buffer<T, TT>::flipBit()’: src/import/hwpf/fapi2/include/buffer.H:316:49: error: expected primary-expression before ‘)’ token iv_data ^= buffer<T>().setBit<B, C>(); ^ In both cases the call site needs to be prepended with the keyword 'template'. Otherwise the name is assumed to be a non-template (as per C++ 14.2/4). Change-Id: I925c35d51787c4f4f232372f0e1299ec2a5cab42 Signed-off-by: Joel Stanley <joel.stanley@au1.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49760 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* STOP: Remove IOTA Decrementer SupportYue Du2018-02-012-2/+5
| | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: I3ea633d0359b523fb7ac37222170dab7de1ab38c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50476 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* Use HCode header timebase frequency for pk traceDoug Gilbert2018-02-011-12/+1
| | | | | | | | | | | | | | | Change-Id: I23616bf971f0d6df4a894c08af349405b97fcbc9 Original-Change-Id: I34a9d8d1a003ae6b07b50039a9ea57ff9fd5af4d RTC: 179852 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46227 Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* STOP: IOTA Panic Code CleanupYue Du2018-02-014-16/+33
| | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ib22fdbf22c48c8e7dab1e2faa624b22e1abbf3a2 CQ: SW409501 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48602 Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
* PM: Fixed generation of MTSPR instruction in STOP API.Prem Shanker Jha2018-02-011-2/+2
| | | | | | | | | | | | | | | | | | STOP API generates SPR restore instruction for a given SPR. Commit fixes the generation of mtspr instruction by API. Problem will show up only when API is changed to generate restore instruction using a GPR other than R0. CQ: SW407799 Change-Id: I2a841a9aae417b7bcd92a323197d9c6a1f3cb149 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49525 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: STEWART E. SMITH <stewart@linux.vnet.ibm.com> Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
* PM: VDM Prolonged Droop FixRahul Batra2018-02-011-99/+41
| | | | | | | | | | | | | | | | | | Key_Cronus_Test=PM_REGRESS Change-Id: Ife6b3c90414b5a07bdab7640e5152c6d3b80df97 Original-Change-Id: I73d38d6029a5b84590d1081855e12c145a535869 CQ: SW413192 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51338 Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
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