Adding attribute to turn memory early data on

Performance wants a way to turn memory early data on & off
using just scoms. Adding one attribute to control all the needed
scoms and defaulting everything so that early data is off.

For the L3 disable cp_me by default using scom

Changing the scom cp_me dial to disable cp_me for all systems
after Nimbus DD2.0. This is expected to be the correct setup
for most systems.

We didn't disable the cp_me at the scan, because the scom can
only disable cp_me if ON or allow the scan setting if set OFF. Some
systems might want cp_me enabled by only changing a scom. So the default
is to set cp_me on at the scan and off a the scom. This way only the
scom has to be turned off to enable cp_me.

Also update three scoms in the memory controler that are needed for
early data.

Change-Id: Ib2106ec4b7d26cb084601f2d6eee68833b36d30b
CQ: HW426419
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49261
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c
index 11001fd6..de0bf642 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_scominit.c
@@ -114,6 +114,7 @@ p9_hcd_cache_scominit(uint32_t quad, uint32_t m_ex, int is_stop8)
                 // EXP.L3.L3_MISC.L3CERRS.L3_DMAP_CI_EN_CFG
                 // EXP.L3.L3_MISC.L3CERRS.L3_RDSN_LINEDEL_UE_EN
                 // EXP.L3.L3_MISC.L3CERRS.L3_CERRS_PF_CFG_SKIP_GRP_SCOPE_EN
+                // EXP.L3.L3_MISC.L3CERRS.L3_SCOM_CP_ME_DROP_OVERRIDE (Only set After NDD20)
                 // EXP.L3.L3_MISC.L3CERRS.L3_ADDR_HASH_EN_CFG
                 // EXP.L3.L3_MISC.L3CERRS.L3_SYSMAP_SM_NOT_LG_SEL
                 // EXP.L3.L3_MISC.L3CERRS.L3_HANG_POLL_PULSE_DIV
@@ -137,6 +138,15 @@ p9_hcd_cache_scominit(uint32_t quad, uint32_t m_ex, int is_stop8)
 
 #endif
 
+#if NIMBUS_DD_LEVEL != 10 && NIMBUS_DD_LEVEL != 20
+
+                if (!(pSgpeImgHdr->g_sgpe_reserve_flags & SGPE_ENABLE_MEM_EARLY_DATA_SCOM_POS))
+                {
+                    scom_data.words.upper |= BIT32(6);
+                }
+
+#endif
+
                 if (ex_count == 2)
                 {
                     PK_TRACE("Assert L3_DYN_LCO_BLK_DIS_CFG via EX_L3_MODE_REG0[9]");