diff options
| author | Rahul Batra <rbatra@us.ibm.com> | 2017-09-21 11:02:35 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2018-02-01 16:16:35 -0600 |
| commit | 6f2a8a3beb70f54cf3f9726b7f20fd59eec1d44e (patch) | |
| tree | bf231e2b521ec8f7dd451ad53733e7990f7c662a | |
| parent | d4c33e2c49748f8a90213292d7b380f8b179e80e (diff) | |
| download | talos-hcode-6f2a8a3beb70f54cf3f9726b7f20fd59eec1d44e.tar.gz talos-hcode-6f2a8a3beb70f54cf3f9726b7f20fd59eec1d44e.zip | |
WOF: More Phase 2 Fixes
Key_Cronus_Test=PM_REGRESS
Change-Id: I09ffafa56bb7ed6357af3007396952b493c1deb0
Original-Change-Id: Iba2ff6ffc0c2b06b3d2df1c40f707da63eb020b0
CQ: SW404912
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46595
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c | 15 | ||||
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c | 2 |
2 files changed, 16 insertions, 1 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c index c7607844..43bef826 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c @@ -288,3 +288,18 @@ void p9_pgpe_ipc_sgpe_updt_active_quads(ipc_msg_t* cmd, void* arg) PK_TRACE_INF("IPC: Updt Quads while pending"); } } + + +void p9_pgpe_ipc_ack_sgpe_ctrl_stop_updt_core_enable(ipc_msg_t* cmd, void* arg) +{ + PK_TRACE_INF("IPC: Core Updt Enable ACKed"); + G_pgpe_pstate_record.ipcPendTbl[IPC_ACK_CTRL_STOP_CORE_ENABLE].cmd = cmd; + G_pgpe_pstate_record.ipcPendTbl[IPC_ACK_CTRL_STOP_CORE_ENABLE].pending_processing = 1; +} + +void p9_pgpe_ipc_ack_sgpe_ctrl_stop_updt_core_disable(ipc_msg_t* cmd, void* arg) +{ + PK_TRACE_INF("IPC: Core Updt Disable ACKed"); + G_pgpe_pstate_record.ipcPendTbl[IPC_ACK_CTRL_STOP_CORE_DISABLE].cmd = cmd; + G_pgpe_pstate_record.ipcPendTbl[IPC_ACK_CTRL_STOP_CORE_DISABLE].pending_processing = 1; +} diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c index 83338f84..d1a12e6e 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c @@ -90,6 +90,7 @@ void p9_pgpe_irq_handler_occ_error(void* arg, PkIrqId irq) } pk_irq_vec_restore(&ctx); + PK_TRACE_DBG("OCC Error: Exit"); } @@ -211,7 +212,6 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq) for (q = 0; q < MAX_QUADS; q++) { opit4prQuad = (opit4pr >> ((MAX_QUADS - q + 1) << 2)) & 0xf; - PK_TRACE_DBG("PCB4: opit4prQuad 0x%x", opit4prQuad); if (opit4prQuad) { |
