| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips] Support sigrie instruction | Simon Atanasyan | 2018-11-06 | 1 | -0/+4 |
| * | [mips] Add missing instructions | Aleksandar Beserminji | 2018-08-29 | 1 | -3/+0 |
| * | [mips] Support 64-bit offsets for lb/sb/ld/sd/lld ... instructions | Simon Atanasyan | 2018-06-01 | 1 | -14/+0 |
| * | [mips] Fix the predicates of round, ceiling, floor and trunc. | Simon Dardis | 2018-05-14 | 1 | -0/+12 |
| * | [mips] Accept 32-bit offsets for ld/sd/lld commands | Simon Atanasyan | 2018-05-10 | 1 | -6/+6 |
| * | [mips] Accept 32-bit offsets for lh and lhu commands | Simon Atanasyan | 2018-05-10 | 1 | -4/+4 |
| * | [mips] Correct the predicates of sign extension instructions | Simon Dardis | 2018-05-04 | 1 | -4/+8 |
| * | Revert "[mips] Correct the predicates of sign extension instructions" | Simon Dardis | 2018-05-02 | 1 | -8/+4 |
| * | [mips] Correct the predicates of sign extension instructions | Simon Dardis | 2018-05-02 | 1 | -4/+8 |
| * | [mips] Correct the predicates for shifts. | Simon Dardis | 2018-05-02 | 1 | -3/+45 |
| * | [mips] Accept 32-bit offsets for lb and lbu commands | Simon Atanasyan | 2018-04-26 | 1 | -4/+4 |
| * | [mips] Fix the definition of sync, synci | Simon Dardis | 2018-04-25 | 1 | -1/+4 |
| * | [mips] Show an error if register number is out of range | Simon Atanasyan | 2018-04-24 | 1 | -26/+26 |
| * | [mips] Correct the predicates of the load/store (double)word for coprocessor 3. | Simon Dardis | 2018-04-12 | 1 | -0/+2 |
| * | [mips] Correct the predicates for special nops, tlb ctrl instrs, software bre... | Simon Dardis | 2018-04-12 | 1 | -1/+20 |
| * | Revert "[mips] Guard traps for microMIPS correctly" | Simon Dardis | 2018-03-13 | 1 | -27/+3 |
| * | [mips] Guard traps for microMIPS correctly | Simon Dardis | 2018-03-13 | 1 | -3/+27 |
| * | [AArch64][SVE] Re-submit patch series for ZIP1/ZIP2 | Sander de Smalen | 2017-12-20 | 3 | -14/+14 |
| * | Revert "[AArch64][SVE] Asm" changes, they broke libjpeg_turbo | Reid Kleckner | 2017-12-18 | 3 | -14/+14 |
| * | [TableGen][AsmMatcherEmitter] Only choose specific diagnostic for enabled ins... | Sander de Smalen | 2017-12-18 | 3 | -14/+14 |
| * | [mips] Add test cases for dext/dins family of instructions | Aleksandar Beserminji | 2017-09-29 | 2 | -0/+30 |
| * | [mips] Implement the 'dext' aliases and it's disassembly alias. | Simon Dardis | 2017-09-14 | 1 | -0/+4 |
| * | [mips] correct operand range for DINSM instruction | Petar Jovanovic | 2017-09-13 | 1 | -0/+1 |
| * | [mips][microMIPS] add lapc instruction | Petar Jovanovic | 2017-09-11 | 3 | -4/+14 |
| * | [mips] Add instruction aliases for ds(r|l)l. | Simon Dardis | 2017-06-27 | 1 | -3/+7 |
| * | Reland r306095: [mips] Fix reg positions in the aui/daui instructions | Petar Jovanovic | 2017-06-23 | 1 | -2/+2 |
| * | Revert r306095: [mips] Fix reg positions in the aui/daui instructions | Petar Jovanovic | 2017-06-23 | 1 | -2/+2 |
| * | [mips] Fix register positions in the aui/daui instructions | Petar Jovanovic | 2017-06-23 | 1 | -2/+2 |
| * | [mips] seb, seh instruction aliases | Simon Dardis | 2016-11-22 | 1 | -0/+4 |
| * | [mips] not instruction alias | Simon Dardis | 2016-11-16 | 1 | -0/+2 |
| * | [mips] Fix aui/daui/dahi/dati for MIPSR6 | Simon Dardis | 2016-10-14 | 2 | -7/+20 |
| * | [mips] Add IAS support for dvp, evp | Simon Dardis | 2016-10-13 | 2 | -0/+10 |
| * | Recommit: "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 1 | -0/+4 |
| * | Revert "[mips] Add rsqrt, recip for MIPS" | Simon Dardis | 2016-10-05 | 1 | -4/+0 |
| * | [mips] Add rsqrt, recip for MIPS | Simon Dardis | 2016-09-27 | 1 | -0/+4 |
| * | Revert "[mips] Fix aui/daui/dahi/dati for MIPSR6" | Simon Dardis | 2016-09-16 | 2 | -20/+7 |
| * | [mips] Fix aui/daui/dahi/dati for MIPSR6 | Simon Dardis | 2016-09-16 | 2 | -7/+20 |
| * | [mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix d... | Hrvoje Varga | 2016-08-22 | 1 | -0/+48 |
| * | [mips] Add l.[sd] and s.[sd] instruction aliases | Simon Dardis | 2016-08-17 | 1 | -0/+4 |
| * | [mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText. | Daniel Sanders | 2016-07-27 | 2 | -6/+7 |
| * | [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases | Simon Dardis | 2016-07-26 | 1 | -0/+11 |
| * | [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2... | Zlatko Buljan | 2016-07-11 | 1 | -0/+36 |
| * | [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instruct... | Hrvoje Varga | 2016-06-27 | 1 | -0/+16 |
| * | [mips] Remove tests which should have been deleted. | Simon Dardis | 2016-05-31 | 1 | -19/+0 |
| * | [mips] Enforce compact branch register restrictions | Simon Dardis | 2016-05-31 | 2 | -10/+24 |
| * | [mips] Weaken asm predicate for memory offsets | Simon Dardis | 2016-05-27 | 1 | -0/+22 |
| * | [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGe... | Zlatko Buljan | 2016-05-18 | 1 | -0/+16 |
| * | Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions" | Hrvoje Varga | 2016-05-12 | 1 | -2/+1 |
| * | [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 2016-05-11 | 1 | -1/+2 |
| * | [mips] Use MipsMCExpr instead of MCSymbolRefExpr for all relocations. | Daniel Sanders | 2016-05-03 | 1 | -2/+2 |
