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| author | Simon Atanasyan <simon@atanasyan.com> | 2018-06-01 16:37:53 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2018-06-01 16:37:53 +0000 |
| commit | e80c3ce9cc100b0960c23380163aacbedd191996 (patch) | |
| tree | fff25d6687a59a94f944a2e81bfbc2285a960bc8 /llvm/test/MC/Mips/mips64r6 | |
| parent | 3a44bcf95a7ed624977146967ceba4865ff96d62 (diff) | |
| download | bcm5719-llvm-e80c3ce9cc100b0960c23380163aacbedd191996.tar.gz bcm5719-llvm-e80c3ce9cc100b0960c23380163aacbedd191996.zip | |
[mips] Support 64-bit offsets for lb/sb/ld/sd/lld ... instructions
The `MipsAsmParser::loadImmediate` can load immediates of various sizes
into a register. Idea of this change is to use `loadImmediate` in the
`MipsAsmParser::expandMemInst` method to load offset into a register and
then call required load/store instruction.
The patch removes separate `expandLoadInst` and `expandStoreInst`
methods and does everything in the `expandMemInst` method to escape code
duplication.
Differential Revision: https://reviews.llvm.org/D47316
llvm-svn: 333774
Diffstat (limited to 'llvm/test/MC/Mips/mips64r6')
| -rw-r--r-- | llvm/test/MC/Mips/mips64r6/invalid.s | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/llvm/test/MC/Mips/mips64r6/invalid.s b/llvm/test/MC/Mips/mips64r6/invalid.s index e355469a720..f9b3707efb1 100644 --- a/llvm/test/MC/Mips/mips64r6/invalid.s +++ b/llvm/test/MC/Mips/mips64r6/invalid.s @@ -60,12 +60,8 @@ local_label: lhe $4, 8($33) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number lhu $4, 8($35) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number lhue $4, 8($37) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number - lh $2, -2147483649($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset - lh $2, 2147483648($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset lhe $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lhe $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction - lhu $4, -2147483649($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset - lhu $4, 2147483648($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset lhue $4, -512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction lhue $4, 512($2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction // FIXME: Following tests are temporarily disabled, until "PredicateControl not in hierarchy" problem is resolved @@ -178,14 +174,8 @@ local_label: dmtc0 $4, $3, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate dmfc0 $4, $3, -1 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate dmfc0 $4, $3, 8 # CHECK: :[[@LINE]]:24: error: expected 3-bit unsigned immediate - ld $2, 2147483648($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset - ld $2, -2147483649($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset ld $32, 65536($32) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number - lld $2, -2147483649($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset - lld $2, 2147483648($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset - sd $2, -2147483649($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset lld $32, 4096($32) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number - sd $2, 2147483648($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 32-bit signed offset sd $32, 65536($32) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number dsrl $2, $4, 64 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate dsrl $2, $4, -2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected 6-bit unsigned immediate @@ -195,12 +185,8 @@ local_label: dsrlv $2, $4, 2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction dsrlv $32, $32, $32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid register number lb $32, 8($5) # CHECK: :[[@LINE]]:12: error: invalid register number - lb $4, -2147483649($5) # CHECK: :[[@LINE]]:16: error: expected memory with 32-bit signed offset - lb $4, 2147483648($5) # CHECK: :[[@LINE]]:16: error: expected memory with 32-bit signed offset lb $4, 8($32) # CHECK: :[[@LINE]]:18: error: invalid register number lbu $32, 8($5) # CHECK: :[[@LINE]]:13: error: invalid register number - lbu $4, -2147483649($5) # CHECK: :[[@LINE]]:17: error: expected memory with 32-bit signed offset - lbu $4, 2147483648($5) # CHECK: :[[@LINE]]:17: error: expected memory with 32-bit signed offset lbu $4, 8($32) # CHECK: :[[@LINE]]:19: error: invalid register number ldc1 $f32, 300($10) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction ldc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset |
