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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-05 16:11:01 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-10-05 16:11:01 +0000 |
| commit | f45a59f80b213c2a23d9b022b56c8f347a901fe5 (patch) | |
| tree | 9a3b9157f2a157b08522f797f3f7ff829fdd6b42 /llvm/test/MC/Mips/mips64r6 | |
| parent | 447164dea22a9a56f1ea45511acc0a040551e767 (diff) | |
| download | bcm5719-llvm-f45a59f80b213c2a23d9b022b56c8f347a901fe5.tar.gz bcm5719-llvm-f45a59f80b213c2a23d9b022b56c8f347a901fe5.zip | |
Recommit: "[mips] Add rsqrt, recip for MIPS"
Add rsqrt.[ds], recip.[ds] for MIPS. Correct the microMIPS definitions for
architecture support and register usage.
Reviewers: vkalintiris, zoran.jovanoic
Differential Review: https://reviews.llvm.org/D24499
llvm-svn: 283334
Diffstat (limited to 'llvm/test/MC/Mips/mips64r6')
| -rw-r--r-- | llvm/test/MC/Mips/mips64r6/valid.s | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/mips64r6/valid.s b/llvm/test/MC/Mips/mips64r6/valid.s index b92fd09f310..7ad4dc3c3d2 100644 --- a/llvm/test/MC/Mips/mips64r6/valid.s +++ b/llvm/test/MC/Mips/mips64r6/valid.s @@ -194,8 +194,12 @@ a: # CHECK-NEXT: .set mips32r2 # CHECK-NEXT: rdhwr $sp, $11 # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b] + recip.d $f19,$f6 # CHECK: recip.d $f19, $f6 # encoding: [0x46,0x20,0x34,0xd5] + recip.s $f3,$f30 # CHECK: recip.s $f3, $f30 # encoding: [0x46,0x00,0xf0,0xd5] rint.d $f2, $f4 # CHECK: rint.d $f2, $f4 # encoding: [0x46,0x20,0x20,0x9a] rint.s $f2, $f4 # CHECK: rint.s $f2, $f4 # encoding: [0x46,0x00,0x20,0x9a] + rsqrt.s $f0,$f4 # CHECK: rsqrt.s $f0, $f4 # encoding: [0x46,0x00,0x20,0x16] + rsqrt.d $f2,$f6 # CHECK: rsqrt.d $f2, $f6 # encoding: [0x46,0x20,0x30,0x96] s.s $f2, 8($3) # CHECK: swc1 $f2, 8($3) # encoding: [0xe4,0x62,0x00,0x08] s.d $f2, 8($3) # CHECK: sdc1 $f2, 8($3) # encoding: [0xf4,0x62,0x00,0x08] sc $15,-40($s3) # CHECK: sc $15, -40($19) # encoding: [0x7e,0x6f,0xec,0x26] |
