| Commit message (Expand) | Author | Age | Files | Lines |
| * | [Hexagon] Replace instruction definitions with auto-generated ones | Krzysztof Parzyszek | 2017-02-10 | 18 | -931/+931 |
| * | [Hexagon] Adding gp+ to the syntax of gp-relative instructions | Krzysztof Parzyszek | 2017-02-06 | 3 | -14/+14 |
| * | [Hexagon] Treat all conditional branches as predicted (not-taken by default) | Krzysztof Parzyszek | 2016-05-09 | 1 | -2/+2 |
| * | [Hexagon] Fixing store instructions and reenabling a few more tests. | Colin LeMahieu | 2015-11-10 | 1 | -1/+0 |
| * | [Hexagon] Fixing load instruction parsing and reenabling tests. | Colin LeMahieu | 2015-11-10 | 1 | -1/+0 |
| * | [Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction pars... | Colin LeMahieu | 2015-11-09 | 10 | -194/+372 |
| * | [Hexagon] Adding decoders for signed operands and ensuring all signed operand... | Colin LeMahieu | 2015-06-10 | 1 | -1/+1 |
| * | [Hexagon] Adding missing vector multiply instruction encodings. Converting m... | Colin LeMahieu | 2015-02-03 | 2 | -0/+36 |
| * | [Hexagon] Adding vector shift instructions and tests. | Colin LeMahieu | 2015-01-30 | 1 | -13/+81 |
| * | [Hexagon] Adding vector predicate instructions. | Colin LeMahieu | 2015-01-30 | 1 | -1/+69 |
| * | [Hexagon] Adding vector permutation instructions and tests. | Colin LeMahieu | 2015-01-30 | 1 | -1/+87 |
| * | [Hexagon] Adding vector multiplies. Cleaning up tests. | Colin LeMahieu | 2015-01-30 | 2 | -2/+198 |
| * | [Hexagon] Adding XTYPE/COMPLEX instructions and cleaning up tests. | Colin LeMahieu | 2015-01-30 | 2 | -1/+153 |
| * | [Hexagon] Adding XTYPE/ALU vector instructions. Organizing test files. | Colin LeMahieu | 2015-01-30 | 6 | -16/+287 |
| * | [Hexagon] Adding a number of vector load variants and organizing tests. | Colin LeMahieu | 2015-01-30 | 2 | -1/+81 |
| * | [Hexagon] Organizing tests and adding a few missing jump instruction encodings. | Colin LeMahieu | 2015-01-29 | 5 | -10/+68 |
| * | [Hexagon] Adding missing instruction encodings and tests. | Colin LeMahieu | 2015-01-29 | 2 | -6/+138 |
| * | [Hexagon] Adding alu vector instructions | Colin LeMahieu | 2015-01-29 | 1 | -0/+40 |
| * | [Hexagon] Updating many V4 intrinsic patterns. Adding missing instruction an... | Colin LeMahieu | 2015-01-28 | 1 | -0/+2 |
| * | [Hexagon] Adding XTYPE/MPY intrinsic tests and some missing multiply instruct... | Colin LeMahieu | 2015-01-28 | 1 | -2/+8 |
| * | [Hexagon] Replacing XTYPE/SHIFT intrinsic patternss. Adding tests and missin... | Colin LeMahieu | 2015-01-28 | 1 | -0/+4 |
| * | [Hexagon] Adding new-value store and bit reverse instructions. | Colin LeMahieu | 2015-01-15 | 2 | -0/+29 |
| * | [Hexagon] Removing old versions of vsplice, valign, cl0, ct0 and updating ref... | Colin LeMahieu | 2015-01-15 | 1 | -0/+4 |
| * | [Hexagon] Adding vmux instruction. Removing old transfer instructions and up... | Colin LeMahieu | 2015-01-15 | 1 | -1/+3 |
| * | [Hexagon] Adding floating point classification and creation. | Colin LeMahieu | 2015-01-07 | 1 | -0/+12 |
| * | [Hexagon] Adding encodings for v5 floating point instructions. | Colin LeMahieu | 2015-01-07 | 1 | -0/+98 |
| * | [Hexagon] Adding encoding for popcount, fastcorner, dword asr with rounding. | Colin LeMahieu | 2015-01-07 | 3 | -0/+8 |
| * | [Hexagon] Adding compound jump encodings. | Colin LeMahieu | 2015-01-06 | 1 | -0/+148 |
| * | [Hexagon] Adding encoding for misc v4 instructions: boundscheck, tlbmatch, dc... | Colin LeMahieu | 2015-01-06 | 2 | -0/+8 |
| * | [Hexagon] Adding encoding information for absolute address loads. | Colin LeMahieu | 2015-01-06 | 1 | -0/+12 |
| * | [Hexagon] Adding dealloc_return encoding and absolute address stores. | Colin LeMahieu | 2015-01-06 | 2 | -0/+28 |
| * | [Hexagon] Adding add/sub with carry, logical shift left by immediate and memo... | Colin LeMahieu | 2015-01-05 | 3 | -0/+56 |
| * | [Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accu... | Colin LeMahieu | 2015-01-05 | 3 | -0/+32 |
| * | [Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without ... | Colin LeMahieu | 2015-01-05 | 2 | -0/+22 |
| * | [Hexagon] Adding V4 logic-logic instructions and tests. | Colin LeMahieu | 2015-01-05 | 1 | -0/+26 |
| * | [Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions. | Colin LeMahieu | 2015-01-05 | 2 | -0/+6 |
| * | [Hexagon] Adding round reg/imm and bitsplit instructions. | Colin LeMahieu | 2015-01-05 | 2 | -0/+8 |
| * | [Hexagon] Adding accumulating add/sub, doubleword logic-not variants, doublew... | Colin LeMahieu | 2014-12-31 | 3 | -0/+24 |
| * | [Hexagon] Adding double-logic on predicate instructions. | Colin LeMahieu | 2014-12-30 | 1 | -2/+22 |
| * | [Hexagon] Adding newvalue compare and jumps. | Colin LeMahieu | 2014-12-30 | 1 | -0/+134 |
| * | [Hexagon] Adding postincrement register newvalue stores. | Colin LeMahieu | 2014-12-30 | 1 | -0/+9 |
| * | [Hexagon] Removing old newvalue store variants. Adding postincrement immedia... | Colin LeMahieu | 2014-12-30 | 1 | -0/+51 |
| * | [Hexagon] Adding indexed store new-value variants. | Colin LeMahieu | 2014-12-30 | 1 | -0/+51 |
| * | [Hexagon] Adding indexed store of immediates. | Colin LeMahieu | 2014-12-30 | 1 | -0/+36 |
| * | [Hexagon] Adding indexed stores. | Colin LeMahieu | 2014-12-30 | 2 | -0/+115 |
| * | [Hexagon] Adding reg-reg indexed load forms. | Colin LeMahieu | 2014-12-30 | 1 | -2/+74 |
| * | [Hexagon] Adding compare byte/halfword reg-reg/reg-imm forms. Adding compare... | Colin LeMahieu | 2014-12-30 | 2 | -0/+28 |
| * | [Hexagon] Updating constant extender def, adding alu-not instructions, compar... | Colin LeMahieu | 2014-12-30 | 2 | -4/+17 |
| * | [Hexagon] Adding allocframe, post-increment circular immediate stores, post-i... | Colin LeMahieu | 2014-12-29 | 1 | -1/+34 |
| * | [Hexagon] Adding post-increment register form stores and register-immediate f... | Colin LeMahieu | 2014-12-29 | 1 | -0/+82 |