[Hexagon] Adding XTYPE/ALU vector instructions. Organizing test files.

llvm-svn: 227598

6 files changed, 287 insertions, 16 deletions

diff --git a/llvm/test/MC/Disassembler/Hexagon/memop.txt b/llvm/test/MC/Disassembler/Hexagon/memop.txt
index 7c944121ddc..47dfd9338c6 100644
--- a/llvm/test/MC/Disassembler/Hexagon/memop.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/memop.txt
@@ -1,5 +1,7 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.6 MEMOP
 
+# Operation on memory byte
 0x95 0xd9 0x11 0x3e
 # CHECK: memb(r17+#51) += r21
 0xb5 0xd9 0x11 0x3e
@@ -16,6 +18,8 @@
 # CHECK: memb(r17+#51) = clrbit(#21)
 0xf5 0xd9 0x11 0x3f
 # CHECK: memb(r17+#51) = setbit(#21)
+
+# Operation on memory halfword
 0x95 0xd9 0x31 0x3e
 # CHECK: memh(r17+#102) += r21
 0xb5 0xd9 0x31 0x3e
@@ -32,6 +36,8 @@
 # CHECK: memh(r17+#102) = clrbit(#21)
 0xf5 0xd9 0x31 0x3f
 # CHECK: memh(r17+#102) = setbit(#21)
+
+# Operation on memory word
 0x95 0xd9 0x51 0x3e
 # CHECK: memw(r17+#204) += r21
 0xb5 0xd9 0x51 0x3e
diff --git a/llvm/test/MC/Disassembler/Hexagon/nv_j.txt b/llvm/test/MC/Disassembler/Hexagon/nv_j.txt
index e5cee4d4438..a6773c3f3c5 100644
--- a/llvm/test/MC/Disassembler/Hexagon/nv_j.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/nv_j.txt
@@ -1,5 +1,7 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.7.1 NV/J
 
+# Jump to address conditioned on new register value
 0x11 0x40 0x71 0x70 0x92 0xd5 0x02 0x20
 # CHECK: r17 = r17
 # CHECK-NEXT: if (cmp.eq(r2.new, r21)) jump:nt
diff --git a/llvm/test/MC/Disassembler/Hexagon/nv_st.txt b/llvm/test/MC/Disassembler/Hexagon/nv_st.txt
index 811a0ca0ff6..ef49455b80b 100644
--- a/llvm/test/MC/Disassembler/Hexagon/nv_st.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/nv_st.txt
@@ -1,5 +1,7 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.7.2 NV/ST
 
+# Store new-value byte
 0x1f 0x40 0x7f 0x70 0x82 0xf5 0xb1 0x3b
 # CHECK: r31 = r31
 # CHECK-NEXT: memb(r17 + r21<<#3) = r2.new
@@ -21,6 +23,8 @@
 0x1f 0x40 0x7f 0x70 0x00 0xe2 0xb1 0xaf
 # CHECK: r31 = r31
 # CHECK-NEXT: memb(r17 ++ m1:brev) = r2.new
+
+# Store new-value byte conditionally
 0x1f 0x40 0x7f 0x70 0xe2 0xf5 0xb1 0x34
 # CHECK: r31 = r31
 # CHECK-NEXT: if (p3) memb(r17+r21<<#3) = r2.new
@@ -64,6 +68,7 @@
 # CHECK-NEXT: r31 = r31
 # CHECK-NEXT: if (!p3.new) memb(r17++#5) = r2.new
 
+# Store new-value halfword
 0x1f 0x40 0x7f 0x70 0x8a 0xf5 0xb1 0x3b
 # CHECK: r31 = r31
 # CHECK-NEXT: memh(r17 + r21<<#3) = r2.new
@@ -85,6 +90,8 @@
 0x1f 0x40 0x7f 0x70 0x00 0xea 0xb1 0xaf
 # CHECK: r31 = r31
 # CHECK-NEXT: memh(r17 ++ m1:brev) = r2.new
+
+# Store new-value halfword conditionally
 0x1f 0x40 0x7f 0x70 0xea 0xf5 0xb1 0x34
 # CHECK: r31 = r31
 # CHECK-NEXT: if (p3) memh(r17+r21<<#3) = r2.new
@@ -128,6 +135,7 @@
 # CHECK-NEXT: r31 = r31
 # CHECK-NEXT: if (!p3.new) memh(r17++#10) = r2.new
 
+# Store new-value word
 0x1f 0x40 0x7f 0x70 0x92 0xf5 0xb1 0x3b
 # CHECK: r31 = r31
 # CHECK-NEXT: memw(r17 + r21<<#3) = r2.new
@@ -149,6 +157,8 @@
 0x1f 0x40 0x7f 0x70 0x00 0xf2 0xb1 0xaf
 # CHECK: r31 = r31
 # CHECK-NEXT: memw(r17 ++ m1:brev) = r2.new
+
+# Store new-value word conditionally
 0x1f 0x40 0x7f 0x70 0xf2 0xf5 0xb1 0x34
 # CHECK: r31 = r31
 # CHECK-NEXT: if (p3) memw(r17+r21<<#3) = r2.new
diff --git a/llvm/test/MC/Disassembler/Hexagon/st.txt b/llvm/test/MC/Disassembler/Hexagon/st.txt
index 4d1a491b344..3b809d3465a 100644
--- a/llvm/test/MC/Disassembler/Hexagon/st.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/st.txt
@@ -1,5 +1,7 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.8 ST
 
+# Store doubleword
 0x9e 0xf5 0xd1 0x3b
 # CHECK: memd(r17 + r21<<#3) = r31:30
 0x28 0xd4 0xc0 0x48
@@ -16,6 +18,8 @@
 # CHECK: memd(r17++m1) = r21:20
 0x00 0xf4 0xd1 0xaf
 # CHECK: memd(r17 ++ m1:brev) = r21:20
+
+# Store doubleword conditionally
 0xfe 0xf5 0xd1 0x34
 # CHECK: if (p3) memd(r17+r21<<#3) = r31:30
 0xfe 0xf5 0xd1 0x35
@@ -47,6 +51,7 @@
 # CHECK: p3 = r5
 # CHECK-NEXT: if (!p3.new) memd(r17++#40) = r21:20
 
+# Store byte
 0x9f 0xf5 0x11 0x3b
 # CHECK: memb(r17 + r21<<#3) = r31
 0x9f 0xca 0x11 0x3c
@@ -65,6 +70,8 @@
 # CHECK: memb(r17++m1) = r21
 0x00 0xf5 0x11 0xaf
 # CHECK: memb(r17 ++ m1:brev) = r21
+
+# Store byte conditionally
 0xff 0xf5 0x11 0x34
 # CHECK: if (p3) memb(r17+r21<<#3) = r31
 0xff 0xf5 0x11 0x35
@@ -106,6 +113,7 @@
 # CHECK: p3 = r5
 # CHECK-NEXT: if (!p3.new) memb(r17++#5) = r21
 
+# Store halfword
 0x9f 0xf5 0x51 0x3b
 # CHECK: memh(r17 + r21<<#3) = r31
 0x9f 0xf5 0x71 0x3b
@@ -140,6 +148,8 @@
 # CHECK: memh(r17 ++ m1:brev) = r21
 0x00 0xf5 0x71 0xaf
 # CHECK: memh(r17 ++ m1:brev) = r21.h
+
+# Store halfword conditionally
 0xff 0xf5 0x51 0x34
 # CHECK: if (p3) memh(r17+r21<<#3) = r31
 0xff 0xf5 0x71 0x34
@@ -211,6 +221,7 @@
 # CHECK: p3 = r5
 # CHECK-NEXT: if (!p3.new) memh(r17++#10) = r21.h
 
+# Store word
 0x9f 0xf5 0x91 0x3b
 # CHECK: memw(r17 + r21<<#3) = r31
 0x9f 0xca 0x51 0x3c
@@ -229,6 +240,8 @@
 # CHECK: memw(r17++m1) = r21
 0x00 0xf5 0x91 0xaf
 # CHECK: memw(r17 ++ m1:brev) = r21
+
+# Store word conditionally
 0xff 0xf5 0x91 0x34
 # CHECK: if (p3) memw(r17+r21<<#3) = r31
 0xff 0xf5 0x91 0x35
@@ -270,5 +283,6 @@
 # CHECK: p3 = r5
 # CHECK-NEXT: if (p3.new) memw(r17++#20) = r21
 
+# Allocate stack frame
 0x1f 0xc0 0x9d 0xa0
 # CHECK: allocframe(#248)
\ No newline at end of file
diff --git a/llvm/test/MC/Disassembler/Hexagon/system_user.txt b/llvm/test/MC/Disassembler/Hexagon/system_user.txt
index 51d082a9e18..d55a94e939b 100644
--- a/llvm/test/MC/Disassembler/Hexagon/system_user.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/system_user.txt
@@ -1,12 +1,26 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.9.1 SYSTEM/USER
 
+# Load locked
 0x11 0xc0 0x15 0x92
 # CHECK: r17 = memw_locked(r21)
 0x10 0xd0 0x15 0x92
 # CHECK: r17:16 = memd_locked(r21)
+
+# Store conditional
+0x03 0xd5 0xb1 0xa0
+# CHECK: memw_locked(r17, p3) = r21
+0x03 0xd4 0xf1 0xa0
+# CHECK: memd_locked(r17, p3) = r21:20
+
+# Memory barrier
 0x00 0xc0 0x00 0xa8
 # CHECK: barrier
+
+# Data cache prefetch
 0x15 0xc0 0x11 0x94
 # CHECK: dcfetch(r17 + #168)
+
+# Send value to ETM trace
 0x00 0xc0 0x51 0x62
 # CHECK: trace(r17)
diff --git a/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt b/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt
index bd9d2d3116c..d44787d69f5 100644
--- a/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/xtype_alu.txt
@@ -1,11 +1,15 @@
-# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
+# RUN: llvm-mc -triple=hexagon -disassemble < %s | FileCheck %s
+# Hexagon Programmer's Reference Manual 11.10.1 XTYPE/ALU
 
+# Absolute value doubleword
 0xd0 0xc0 0x94 0x80
 # CHECK: r17:16 = abs(r21:20)
 0x91 0xc0 0x95 0x8c
 # CHECK: r17 = abs(r21)
 0xb1 0xc0 0x95 0x8c
 # CHECK: r17 = abs(r21):sat
+
+# Add and accumulate
 0xff 0xd1 0x35 0xdb
 # CHECK: r17 = add(r21, add(r31, #23))
 0xff 0xd1 0xb5 0xdb
@@ -18,8 +22,18 @@
 # CHECK: r17 += add(r21, r31)
 0x31 0xdf 0x95 0xef
 # CHECK: r17 -= add(r21, r31)
+
+# Add doublewords
 0xf0 0xde 0x14 0xd3
 # CHECK: r17:16 = add(r21:20, r31:30)
+0xb0 0xde 0x74 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30):sat
+0xd0 0xde 0x74 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30):raw:lo
+0xf0 0xde 0x74 0xd3
+# CHECK: r17:16 = add(r21:20, r31:30):raw:hi
+
+# Add halfword
 0x11 0xd5 0x1f 0xd5
 # CHECK: r17 = add(r21.l, r31.l)
 0x51 0xd5 0x1f 0xd5
@@ -44,20 +58,16 @@
 # CHECK: r17 = add(r21.h, r31.l):sat:<<16
 0xf1 0xd5 0x5f 0xd5
 # CHECK: r17 = add(r21.h, r31.h):sat:<<16
+
+# Add or subtract doublewords with carry
 0x70 0xde 0xd4 0xc2
 # CHECK: r17:16 = add(r21:20, r31:30, p3):carry
 0x70 0xde 0xf4 0xc2
 # CHECK: r17:16 = sub(r21:20, r31:30, p3):carry
+
+# Logical doublewords
 0x90 0xc0 0x94 0x80
 # CHECK: r17:16 = not(r21:20)
-0xf0 0xde 0x14 0xd3
-# CHECK: r17:16 = add(r21:20, r31:30)
-0xb0 0xde 0x74 0xd3
-# CHECK: r17:16 = add(r21:20, r31:30):sat
-0xd0 0xde 0x74 0xd3
-# CHECK: r17:16 = add(r21:20, r31:30):raw:lo
-0xf0 0xde 0x74 0xd3
-# CHECK: r17:16 = add(r21:20, r31:30):raw:hi
 0x10 0xde 0xf4 0xd3
 # CHECK: r17:16 = and(r21:20, r31:30)
 0x30 0xd4 0xfe 0xd3
@@ -66,8 +76,14 @@
 # CHECK: r17:16 = or(r21:20, r31:30)
 0x70 0xd4 0xfe 0xd3
 # CHECK: r17:16 = or(r21:20, ~r31:30)
+0x90 0xde 0xf4 0xd3
+# CHECK: r17:16 = xor(r21:20, r31:30)
+
+# Logical-logical doublewords
 0x10 0xde 0x94 0xca
 # CHECK: r17:16 ^= xor(r21:20, r31:30)
+
+# Logical-logical words
 0xf1 0xc3 0x15 0xda
 # CHECK: r17 |= and(r21, #31)
 0xf5 0xc3 0x51 0xda
@@ -98,28 +114,42 @@
 # CHECK: r17 ^= and(r21, r31)
 0x71 0xdf 0xd5 0xef
 # CHECK: r17 ^= or(r21, r31)
+
+# Maximum words
 0x11 0xdf 0xd5 0xd5
 # CHECK: r17 = max(r21, r31)
 0x91 0xdf 0xd5 0xd5
 # CHECK: r17 = maxu(r21, r31)
+
+# Maximum doublewords
 0x90 0xde 0xd4 0xd3
 # CHECK: r17:16 = max(r21:20, r31:30)
 0xb0 0xde 0xd4 0xd3
 # CHECK: r17:16 = maxu(r21:20, r31:30)
+
+# Minimum words
 0x11 0xd5 0xbf 0xd5
 # CHECK: r17 = min(r21, r31)
 0x91 0xd5 0xbf 0xd5
 # CHECK: r17 = minu(r21, r31)
+
+# Minimum doublewords
 0xd0 0xd4 0xbe 0xd3
 # CHECK: r17:16 = min(r21:20, r31:30)
 0xf0 0xd4 0xbe 0xd3
 # CHECK: r17:16 = minu(r21:20, r31:30)
+
+# Module wrap
 0xf1 0xdf 0xf5 0xd3
 # CHECK: r17 = modwrap(r21, r31)
+
+# Negate
 0xb0 0xc0 0x94 0x80
 # CHECK: r17:16 = neg(r21:20)
 0xd1 0xc0 0x95 0x8c
 # CHECK: r17 = neg(r21):sat
+
+# Round
 0x31 0xc0 0xd4 0x88
 # CHECK: r17 = round(r21:20):sat
 0x11 0xdf 0xf5 0x8c
@@ -134,8 +164,16 @@
 # CHECK: r17 = round(r21, r31)
 0xd1 0xdf 0xd5 0xc6
 # CHECK: r17 = round(r21, r31):sat
+
+# Subtract doublewords
+0xf0 0xd4 0x3e 0xd3
+# CHECK: r17:16 = sub(r21:20, r31:30)
+
+# Subtract and accumulate words
 0x71 0xd5 0x1f 0xef
 # CHECK: r17 += sub(r21, r31)
+
+# Subtract halfword
 0x11 0xd5 0x3f 0xd5
 # CHECK: r17 = sub(r21.l, r31.l)
 0x51 0xd5 0x3f 0xd5
@@ -160,7 +198,194 @@
 # CHECK: r17 = sub(r21.h, r31.l):sat:<<16
 0xf1 0xd5 0x7f 0xd5
 # CHECK: r17 = sub(r21.h, r31.h):sat:<<16
+
+# Sign extend word to doubleword
 0x10 0xc0 0x55 0x84
 # CHECK: r17:16 = sxtw(r21)
-0x90 0xde 0xf4 0xd3
-# CHECK: r17:16 = xor(r21:20, r31:30)
+
+# Vector absolute value halfwords
+0x90 0xc0 0x54 0x80
+# CHECK: r17:16 = vabsh(r21:20)
+0xb0 0xc0 0x54 0x80
+# CHECK: r17:16 = vabsh(r21:20):sat
+
+# Vector absolute value words
+0xd0 0xc0 0x54 0x80
+# CHECK: r17:16 = vabsw(r21:20)
+0xf0 0xc0 0x54 0x80
+# CHECK: r17:16 = vabsw(r21:20):sat
+
+# Vector absolute difference halfwords
+0x10 0xd4 0x7e 0xe8
+# CHECK: r17:16 = vabsdiffh(r21:20, r31:30)
+
+# Vector add halfwords
+0x50 0xde 0x14 0xd3
+# CHECK: r17:16 = vaddh(r21:20, r31:30)
+0x70 0xde 0x14 0xd3
+# CHECK: r17:16 = vaddh(r21:20, r31:30):sat
+0x90 0xde 0x14 0xd3
+# CHECK: r17:16 = vadduh(r21:20, r31:30):sat
+
+# Vector add halfwords with saturate and pack to unsigned bytes
+0x31 0xde 0x54 0xc1
+# CHECK: r17 = vaddhub(r21:20, r31:30):sat
+
+# Vector reduce add unsigned bytes
+0x30 0xde 0x54 0xe8
+# CHECK: r17:16 = vraddub(r21:20, r31:30)
+0x30 0xde 0x54 0xea
+# CHECK: r17:16 += vraddub(r21:20, r31:30)
+
+# Vector reduce add halfwords
+0x31 0xde 0x14 0xe9
+# CHECK: r17 = vradduh(r21:20, r31:30)
+0xf1 0xde 0x34 0xe9
+# CHECK: r17 = vraddh(r21:20, r31:30)
+
+# Vector add bytes
+0x10 0xde 0x14 0xd3
+# CHECK: r17:16 = vaddub(r21:20, r31:30)
+0x30 0xde 0x14 0xd3
+# CHECK: r17:16 = vaddub(r21:20, r31:30):sat
+
+# Vector add words
+0xb0 0xde 0x14 0xd3
+# CHECK: r17:16 = vaddw(r21:20, r31:30)
+0xd0 0xde 0x14 0xd3
+# CHECK: r17:16 = vaddw(r21:20, r31:30):sat
+
+# Vector average halfwords
+0x50 0xde 0x54 0xd3
+# CHECK: r17:16 = vavgh(r21:20, r31:30)
+0x70 0xde 0x54 0xd3
+# CHECK: r17:16 = vavgh(r21:20, r31:30):rnd
+0x90 0xde 0x54 0xd3
+# CHECK: r17:16 = vavgh(r21:20, r31:30):crnd
+0xb0 0xde 0x54 0xd3
+# CHECK: r17:16 = vavguh(r21:20, r31:30)
+0xd0 0xde 0x54 0xd3
+# CHECK: r17:16 = vavguh(r21:20, r31:30):rnd
+0x10 0xd4 0x9e 0xd3
+# CHECK: r17:16 = vnavgh(r21:20, r31:30)
+0x30 0xd4 0x9e 0xd3
+# CHECK: r17:16 = vnavgh(r21:20, r31:30):rnd:sat
+0x50 0xd4 0x9e 0xd3
+# CHECK: r17:16 = vnavgh(r21:20, r31:30):crnd:sat
+
+# Vector average unsigned bytes
+0x10 0xde 0x54 0xd3
+# CHECK: r17:16 = vavgub(r21:20, r31:30)
+0x30 0xde 0x54 0xd3
+# CHECK: r17:16 = vavgub(r21:20, r31:30):rnd
+
+# Vector average words
+0x10 0xde 0x74 0xd3
+# CHECK: r17:16 = vavgw(r21:20, r31:30)
+0x30 0xde 0x74 0xd3
+# CHECK: r17:16 = vavgw(r21:20, r31:30):rnd
+0x50 0xde 0x74 0xd3
+# CHECK: r17:16 = vavgw(r21:20, r31:30):crnd
+0x70 0xde 0x74 0xd3
+# CHECK: r17:16 = vavguw(r21:20, r31:30)
+0x90 0xde 0x74 0xd3
+# CHECK: r17:16 = vavguw(r21:20, r31:30):rnd
+0x70 0xd4 0x9e 0xd3
+# CHECK: r17:16 = vnavgw(r21:20, r31:30)
+0x90 0xd4 0x9e 0xd3
+# CHECK: r17:16 = vnavgw(r21:20, r31:30):rnd:sat
+0xd0 0xd4 0x9e 0xd3
+# CHECK: r17:16 = vnavgw(r21:20, r31:30):crnd:sat
+
+# Vector conditional negate
+0x50 0xdf 0xd4 0xc3
+# CHECK: r17:16 = vcnegh(r21:20, r31)
+
+0xf0 0xff 0x34 0xcb
+# CHECK: r17:16 += vrcnegh(r21:20, r31)
+
+# Vector maximum bytes
+0x10 0xd4 0xde 0xd3
+# CHECK: r17:16 = vmaxub(r21:20, r31:30)
+0xd0 0xd4 0xde 0xd3
+# CHECK: r17:16 = vmaxb(r21:20, r31:30)
+
+# Vector maximum halfwords
+0x30 0xd4 0xde 0xd3
+# CHECK: r17:16 = vmaxh(r21:20, r31:30)
+0x50 0xd4 0xde 0xd3
+# CHECK: r17:16 = vmaxuh(r21:20, r31:30)
+
+# Vector reduce maximum halfwords
+0x3f 0xd0 0x34 0xcb
+# CHECK: r17:16 = vrmaxh(r21:20, r31)
+0x3f 0xf0 0x34 0xcb
+# CHECK: r17:16 = vrmaxuh(r21:20, r31)
+
+# Vector reduce maximum words
+0x5f 0xd0 0x34 0xcb
+# CHECK: r17:16 = vrmaxw(r21:20, r31)
+0x5f 0xf0 0x34 0xcb
+# CHECK: r17:16 = vrmaxuw(r21:20, r31)
+
+# Vector maximum words
+0xb0 0xd4 0xbe 0xd3
+# CHECK: r17:16 = vmaxuw(r21:20, r31:30)
+0x70 0xd4 0xde 0xd3
+# CHECK: r17:16 = vmaxw(r21:20, r31:30)
+
+# Vector minimum bytes
+0x10 0xd4 0xbe 0xd3
+# CHECK: r17:16 = vminub(r21:20, r31:30)
+0xf0 0xd4 0xde 0xd3
+# CHECK: r17:16 = vminb(r21:20, r31:30)
+
+# Vector minimum halfwords
+0x30 0xd4 0xbe 0xd3
+# CHECK: r17:16 = vminh(r21:20, r31:30)
+0x50 0xd4 0xbe 0xd3
+# CHECK: r17:16 = vminuh(r21:20, r31:30)
+
+# Vector reduce minimum halfwords
+0xbf 0xd0 0x34 0xcb
+# CHECK: r17:16 = vrminh(r21:20, r31)
+0xbf 0xf0 0x34 0xcb
+# CHECK: r17:16 = vrminuh(r21:20, r31)
+
+# Vector reduce minimum words
+0xdf 0xd0 0x34 0xcb
+# CHECK: r17:16 = vrminw(r21:20, r31)
+0xdf 0xf0 0x34 0xcb
+# CHECK: r17:16 = vrminuw(r21:20, r31)
+
+# Vector minimum words
+0x70 0xd4 0xbe 0xd3
+# CHECK: r17:16 = vminw(r21:20, r31:30)
+0x90 0xd4 0xbe 0xd3
+# CHECK: r17:16 = vminuw(r21:20, r31:30)
+
+# Vector sum of absolute differences unsigned bytes
+0x50 0xde 0x54 0xe8
+# CHECK: r17:16 = vrsadub(r21:20, r31:30)
+0x50 0xde 0x54 0xea
+# CHECK: r17:16 += vrsadub(r21:20, r31:30)
+
+# Vector subtract halfwords
+0x50 0xd4 0x3e 0xd3
+# CHECK: r17:16 = vsubh(r21:20, r31:30)
+0x70 0xd4 0x3e 0xd3
+# CHECK: r17:16 = vsubh(r21:20, r31:30):sat
+0x90 0xd4 0x3e 0xd3
+# CHECK: r17:16 = vsubuh(r21:20, r31:30):sat
+
+# Vector subtract bytes
+0x10 0xd4 0x3e 0xd3
+# CHECK: r17:16 = vsubub(r21:20, r31:30)
+0x30 0xd4 0x3e 0xd3
+# CHECK: r17:16 = vsubub(r21:20, r31:30):sat
+
+# Vector subtract words
+0xb0 0xd4 0x3e 0xd3
+# CHECK: r17:16 = vsubw(r21:20, r31:30)
+0xd0 0xd4 0x3e 0xd3
+# CHECK: r17:16 = vsubw(r21:20, r31:30):sat