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path: root/llvm/test/CodeGen/RISCV/vararg.ll
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* [RISCV] Add codegen support for ilp32f, ilp32d, lp64f, and lp64d ("hard float...Alex Bradbury2019-03-301-5/+15
* [RISCV] Add RV64 CHECK lines to test/CodeGen/RISCV/vararg.ll and prepare for ...Alex Bradbury2019-03-301-644/+1555
* [RISCV][NFC] Remove floating point operations from test/CodeGen/RISCV/vararg.llAlex Bradbury2019-03-301-65/+65
* [RISCV] Only mark fp as reserved if the function has a dedicated frame pointerAlex Bradbury2019-03-131-4/+4
* Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUIAna Pazos2019-01-251-10/+10
* Replace "no-frame-pointer-*" function attributes with "frame-pointer"Francis Visoiu Mistrih2019-01-141-1/+1
* [RISCV] Re-generate test/CodeGen/RISCV/vararg.ll after r344142Alex Bradbury2018-10-111-34/+32
* [RISCV] Regenerate several tests now enableMultipleCopyHints is enabled by de...Alex Bradbury2018-10-051-38/+38
* [RISCV][NFC] Remove dead CHECK lines from vararg.ll testAlex Bradbury2018-10-041-310/+0
* [RISCV] Expand function call to "call" pseudoinstructionShiva Chen2018-04-251-48/+16
* [RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bitsAlex Bradbury2018-04-181-16/+8
* Revert "[RISCV] implement li pseudo instruction"Alex Bradbury2018-04-181-12/+20
* [RISCV] implement li pseudo instructionAlex Bradbury2018-04-171-20/+12
* [RISCV] Implement frame pointer eliminationAlex Bradbury2018-01-181-162/+798
* [RISCV] Support for varargsAlex Bradbury2018-01-101-0/+535
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