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path: root/llvm/test/CodeGen/RISCV/inline-asm.ll
Commit message (Expand)AuthorAgeFilesLines
* [RISCV] Handle globals and block addresses in asm operandsLuís Marques2020-01-131-2/+44
* [RISCV] Fix a couple of tests' CHECKsLuis Marques2019-08-301-0/+29
* [RISCV] Lower inline asm constraint A for RISC-VLewis Revill2019-08-161-0/+25
* [RISCV] Support z and i operand modifiersAlex Bradbury2019-07-081-0/+45
* [RISCV] Fix inline-asm.ll test by adding nounwind attributeAlex Bradbury2019-06-121-3/+3
* [RISCV] Lower inline asm constraints I, J & K for RISC-VLewis Revill2019-06-111-0/+68
* [RISCV][NFC] Add nounwind attribute to functions missing it in test/CodeGen/R...Alex Bradbury2019-05-231-4/+4
* [RISCV][NFC] Add RV64I CHECK lines to inline-asm.ll testAlex Bradbury2019-02-141-0/+31
* [RISCV] Peephole optimisation for load/store of global values or constant add...Alex Bradbury2018-03-191-2/+1
* [RISCV] Implement frame pointer eliminationAlex Bradbury2018-01-181-28/+0
* [RISCV] Add basic support for inline asm constraintsAlex Bradbury2018-01-101-0/+83
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