| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI | Ana Pazos | 2019-01-25 | 1 | -4/+4 |
| * | [RISCV] Constant materialisation for RV64I | Alex Bradbury | 2018-11-16 | 1 | -7/+204 |
| * | [RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits | Alex Bradbury | 2018-04-18 | 1 | -2/+0 |
| * | Revert "[RISCV] implement li pseudo instruction" | Alex Bradbury | 2018-04-18 | 1 | -0/+2 |
| * | [RISCV] Add specific tests for materialising imm32hi20 constants | Alex Bradbury | 2018-04-18 | 1 | -0/+16 |
| * | [RISCV] Implement frame pointer elimination | Alex Bradbury | 2018-01-18 | 1 | -35/+0 |
| * | [RISCV] Enable emission of alias instructions by default | Alex Bradbury | 2017-12-15 | 1 | -6/+6 |
| * | [RISCV] Implement prolog and epilog insertion | Alex Bradbury | 2017-12-11 | 1 | -0/+35 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -5/+5 |
| * | [RISCV] Codegen support for materializing constants | Alex Bradbury | 2017-11-08 | 1 | -0/+47 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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