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| author | Ana Pazos <apazos@codeaurora.org> | 2019-01-25 20:22:49 +0000 |
|---|---|---|
| committer | Ana Pazos <apazos@codeaurora.org> | 2019-01-25 20:22:49 +0000 |
| commit | 05a60643853865c0323acc30c80e2cf948186520 (patch) | |
| tree | be64de4e3a9607095c52f1aec743bd1473db73e2 /llvm/test/CodeGen/RISCV/imm.ll | |
| parent | 81f3fd4bf81247480d2fa172a65b04951e7a0d3e (diff) | |
| download | bcm5719-llvm-05a60643853865c0323acc30c80e2cf948186520.tar.gz bcm5719-llvm-05a60643853865c0323acc30c80e2cf948186520.zip | |
Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI
This reapplies commit r352010 with RISC-V test fixes.
llvm-svn: 352237
Diffstat (limited to 'llvm/test/CodeGen/RISCV/imm.ll')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/imm.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/RISCV/imm.ll b/llvm/test/CodeGen/RISCV/imm.ll index 872b6d5a986..b733b592165 100644 --- a/llvm/test/CodeGen/RISCV/imm.ll +++ b/llvm/test/CodeGen/RISCV/imm.ll @@ -142,8 +142,8 @@ define i64 @imm64_2() nounwind { define i64 @imm64_3() nounwind { ; RV32I-LABEL: imm64_3: ; RV32I: # %bb.0: -; RV32I-NEXT: addi a1, zero, 1 ; RV32I-NEXT: mv a0, zero +; RV32I-NEXT: addi a1, zero, 1 ; RV32I-NEXT: ret ; ; RV64I-LABEL: imm64_3: @@ -157,8 +157,8 @@ define i64 @imm64_3() nounwind { define i64 @imm64_4() nounwind { ; RV32I-LABEL: imm64_4: ; RV32I: # %bb.0: -; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: mv a0, zero +; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: ret ; ; RV64I-LABEL: imm64_4: @@ -172,8 +172,8 @@ define i64 @imm64_4() nounwind { define i64 @imm64_5() nounwind { ; RV32I-LABEL: imm64_5: ; RV32I: # %bb.0: -; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: mv a0, zero +; RV32I-NEXT: lui a1, 524288 ; RV32I-NEXT: ret ; ; RV64I-LABEL: imm64_5: @@ -249,7 +249,7 @@ define i64 @imm64_9() nounwind { ; RV32I-LABEL: imm64_9: ; RV32I: # %bb.0: ; RV32I-NEXT: addi a0, zero, -1 -; RV32I-NEXT: mv a1, a0 +; RV32I-NEXT: addi a1, zero, -1 ; RV32I-NEXT: ret ; ; RV64I-LABEL: imm64_9: |
