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* [AVR] Fix codegen bug in 16-bit loadsDylan McKay2019-01-185-32/+45
* [ScheduleDAGRRList] Do not preschedule the node has ADJCALLSTACKDOWN parentShiva Chen2019-01-181-0/+32
* [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hard...Dylan McKay2019-01-184-2/+32
* [AVR] Update integration/blink.ll as we now generate sbi/cbi instructions.Nirav Dave2019-01-031-26/+6
* [AVR] Reorder the CHECK lines in directmem.ll to match current trunkDylan McKay2018-11-091-14/+19
* [AVR] Fix a backend bug that left extraneous operands after expansionDylan McKay2018-11-051-0/+48
* [AVR] Disallow the LDDWRdPtrQ instruction with Z as the destinationDylan McKay2018-11-054-8/+70
* [AVR] Fix the 'call.ll' CodeGen testDylan McKay2018-10-101-2/+1
* [AVR] Redefine the 'LSL' instruction as an alias of 'ADD'Dylan McKay2018-09-013-3/+3
* [AVR] Define the ROL instruction as an alias of ADCDylan McKay2018-09-011-1/+1
* [AVR] Set trackLivenessAfterRegAllocDylan McKay2018-06-111-0/+336
* [AVR] Add a regression test for struct return loweringDylan McKay2018-03-201-0/+21
* [AVR] Lower i128 divisions to runtime library callsDylan McKay2018-03-191-0/+52
* [AVR] Remove the earlyclobber flag from LDDWRdYQDylan McKay2018-03-061-0/+139
* [AVR] Fix the test suite after r326500.Dylan McKay2018-03-051-1/+1
* [CodeGen] Unify the syntax of MBB successors in MIR and -debug outputFrancis Visoiu Mistrih2018-02-091-2/+2
* [AVR] Fix the testsuite after '%' changed to '$' in MIRDylan McKay2018-02-0840-119/+119
* [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug outputFrancis Visoiu Mistrih2018-02-081-3/+3
* Remove alignment argument from memcpy/memmove/memset in favour of alignment a...Daniel Neilson2018-01-191-2/+2
* [AVR] Fix two CodeGen testsDylan McKay2017-12-092-7/+7
* Relax unaligned access assertion when type is byte alignedDylan McKay2017-12-091-0/+19
* [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.Francis Visoiu Mistrih2017-12-071-5/+5
* [CodeGen] Unify MBB reference format in both MIR and debug outputFrancis Visoiu Mistrih2017-12-042-13/+13
* [CodeGen] Print "%vreg0" as "%0" in both MIR and debug outputFrancis Visoiu Mistrih2017-11-301-4/+4
* [AVR] Use the short form of 'clr <reg>'Dylan McKay2017-11-243-10/+10
* [AVR] Remove the select-mbb-placement-bug.ll testDylan McKay2017-11-141-35/+0
* [AVR] Fix the select-mbb-placement-bug.llDylan McKay2017-10-201-3/+3
* [AVR] Fix the select_mbb_placement_bug.ll testDylan McKay2017-10-181-3/+3
* [AVR] Elaborate LDWRdPtr into `ld r, X++; ld r+1, X`Dylan McKay2017-10-046-26/+26
* [AVR] Insert JMP for long branchesDylan McKay2017-10-041-0/+4137
* [AVR] Fix displacement overflow for LDDW/STDWDylan McKay2017-10-041-0/+18
* [AVR] Fix the build after setting alignment to 1 in r314179Dylan McKay2017-09-263-9/+9
* [AVR] Enable the '__do_copy_data' functionDylan McKay2017-09-112-0/+10
* [AVR] Use the correct register classes for 16-bit atomic operationsDylan McKay2017-08-241-0/+23
* [AVR] Remove the instrumentation passDylan McKay2017-07-231-62/+0
* [AVR] Improve the 'icall-func-pointer-correct-addr-space.ll' testDylan McKay2017-07-231-8/+20
* [AVR] Fix a typo in the testsDylan McKay2017-07-161-2/+2
* [AVR] Fix indirect calls to function pointersDylan McKay2017-07-131-0/+15
* [AVR] Use the generic branch relaxerDylan McKay2017-07-114-7/+104
* [AVR] Fix test errors due to tied operands not matchingDylan McKay2017-07-095-7/+7
* Revert "[AVR] Add the branch selection pass from the GitHub repository"Dylan McKay2017-07-053-7/+7
* [AVR] Add the branch selection pass from the GitHub repositoryDylan McKay2017-07-053-7/+7
* [AVR] Fix bug which caused assertion errors for some FRMIDX instructionsDylan McKay2017-07-041-0/+33
* [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-2/+2
* [AVR] When lowering Select8/Select16, put newly generated MBBs in the same spotDylan McKay2017-05-131-0/+35
* [AVR] Reserve the Y register in all functionsDylan McKay2017-05-033-4/+3
* [AVR] Save/restore the frame pointer for all functionsDylan McKay2017-05-023-19/+19
* [AVR] Implement non-constant bit rotationsDylan McKay2017-05-011-0/+55
* [AVR] Support the LDWRdPtr instruction with the same Src+Dst registerDylan McKay2017-04-253-35/+64
* [AVR] Remove the 'multibyte' asm testDylan McKay2017-04-191-135/+0
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