diff options
| author | Dylan McKay <me@dylanmckay.io> | 2018-09-01 12:23:00 +0000 |
|---|---|---|
| committer | Dylan McKay <me@dylanmckay.io> | 2018-09-01 12:23:00 +0000 |
| commit | 454258671dbb8b528432073a091610f31b58b8c8 (patch) | |
| tree | fe5f4810cced1212942bd6d71d63ce22752da2e9 /llvm/test/CodeGen/AVR | |
| parent | 97daa142f441b806cd1a0aaaee0d404ae54298c3 (diff) | |
| download | bcm5719-llvm-454258671dbb8b528432073a091610f31b58b8c8.tar.gz bcm5719-llvm-454258671dbb8b528432073a091610f31b58b8c8.zip | |
[AVR] Redefine the 'LSL' instruction as an alias of 'ADD'
The 'LSL Rd' instruction is equivalent to 'ADD Rd, Rd'.
llvm-svn: 341278
Diffstat (limited to 'llvm/test/CodeGen/AVR')
| -rw-r--r-- | llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AVR/pseudo/SEXT.mir | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AVR/pseudo/ZEXT.mir | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir b/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir index 854b350d98b..b260e70e509 100644 --- a/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir +++ b/llvm/test/CodeGen/AVR/pseudo/LSLWRd.mir @@ -15,7 +15,7 @@ body: | ; CHECK-LABEL: test - ; CHECK: $r14 = LSLRd $r14, implicit-def $sreg + ; CHECK: $r14 = ADDRdRr $r14, $r14, implicit-def $sreg ; CHECK-NEXT: $r15 = ADCRdRr $r15, $r15, implicit-def $sreg, implicit killed $sreg $r15r14 = LSLWRd $r15r14, implicit-def $sreg diff --git a/llvm/test/CodeGen/AVR/pseudo/SEXT.mir b/llvm/test/CodeGen/AVR/pseudo/SEXT.mir index 116ea21a3b8..b7077a3db28 100644 --- a/llvm/test/CodeGen/AVR/pseudo/SEXT.mir +++ b/llvm/test/CodeGen/AVR/pseudo/SEXT.mir @@ -17,7 +17,7 @@ body: | ; CHECK: $r14 = MOVRdRr $r31 ; CHECK-NEXT: $r15 = MOVRdRr $r31 - ; CHECK-NEXT: $r15 = LSLRd killed $r15, implicit-def $sreg + ; CHECK-NEXT: $r15 = ADDRdRr $r15, killed $r15, implicit-def $sreg ; CHECK-NEXT: $r15 = SBCRdRr killed $r15, killed $r15, implicit-def $sreg, implicit killed $sreg $r15r14 = SEXT $r31, implicit-def $sreg diff --git a/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir b/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir index 116ea21a3b8..b7077a3db28 100644 --- a/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir +++ b/llvm/test/CodeGen/AVR/pseudo/ZEXT.mir @@ -17,7 +17,7 @@ body: | ; CHECK: $r14 = MOVRdRr $r31 ; CHECK-NEXT: $r15 = MOVRdRr $r31 - ; CHECK-NEXT: $r15 = LSLRd killed $r15, implicit-def $sreg + ; CHECK-NEXT: $r15 = ADDRdRr $r15, killed $r15, implicit-def $sreg ; CHECK-NEXT: $r15 = SBCRdRr killed $r15, killed $r15, implicit-def $sreg, implicit killed $sreg $r15r14 = SEXT $r31, implicit-def $sreg |
