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* ARM: fixup more tests to specify the target more explicitlySaleem Abdulrasool2014-04-031-3/+3
| | | | | | | | | | | | | This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. llvm-svn: 205541
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to ↵Stephen Lin2013-07-141-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
* Add some missing isel predicates on def : pat patterns to avoid generating ↵Evan Cheng2010-11-121-14/+25
| | | | | | VFP vmla / vmls (they cause stalls). Disabling them in isel is properly not a right solution, I'll look into a proper solution next. llvm-svn: 118922
* Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.Evan Cheng2010-10-281-2/+2
| | | | llvm-svn: 117531
* Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ↵Evan Cheng2010-10-281-2/+2
| | | | | | to fail. Ugh. llvm-svn: 117520
* - Assign load / store with shifter op address modes the right itinerary classes.Evan Cheng2010-10-281-2/+2
| | | | | | | | | | - For now, loads of [r, r] addressing mode is the same as the [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should identify the former case and reduce the output latency by 1. - Also identify [r, r << 2] case. This special form of shifter addressing mode is "free". llvm-svn: 117519
* putback r116983 and fix simple-fp-encoding.ll testsAndrew Trick2010-10-211-1/+1
| | | | llvm-svn: 116992
* Revert r116983, which is breaking all the buildbots.Owen Anderson2010-10-211-1/+1
| | | | llvm-svn: 116987
* Add missing scheduling itineraries for transfers between core registers and ↵Evan Cheng2010-10-211-1/+1
| | | | | | VFP registers. llvm-svn: 116983
* Change ARM scheduling default to list-hybrid if the target supports floating ↵Evan Cheng2010-05-211-1/+1
| | | | | | point instructions (and is not using soft float). llvm-svn: 104307
* switch the flag for using NEON for SP floating point to a subtarget 'feature'.Jim Grosbach2010-03-251-2/+1
| | | | | | Re-commit. This time complete with testsuite updates. llvm-svn: 99570
* Convert ARM tests to FileCheck for PR5307.Edward O'Callaghan2009-11-221-5/+17
| | | | llvm-svn: 89593
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-091-5/+5
| | | | llvm-svn: 86494
* Remove neonfp attribute and instead set default based on CPU string. Add ↵David Goodwin2009-10-011-2/+2
| | | | | | -arm-use-neon-fp to override the default. llvm-svn: 83218
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-091-5/+5
| | | | llvm-svn: 81293
* Make NEON single-precision FP support the default for cortex-a8 (again).David Goodwin2009-08-071-0/+2
| | | | llvm-svn: 78430
* Initial support for single-precision FP using NEON. Added "neonfp" attribute ↵David Goodwin2009-08-041-0/+11
to enable. Added patterns for some binary FP operations. llvm-svn: 78081
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