diff options
| author | Edward O'Callaghan <eocallaghan@auroraux.org> | 2009-11-22 14:23:33 +0000 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@auroraux.org> | 2009-11-22 14:23:33 +0000 |
| commit | 21d7e8aeb1d9d8a46f3a1739058dbf2516394b4d (patch) | |
| tree | 797f51aa34b79f6e91414f05b2d8ce725bc58062 /llvm/test/CodeGen/ARM/fmscs.ll | |
| parent | 014af28ce333609bca47d1228eb2236003a7de40 (diff) | |
| download | bcm5719-llvm-21d7e8aeb1d9d8a46f3a1739058dbf2516394b4d.tar.gz bcm5719-llvm-21d7e8aeb1d9d8a46f3a1739058dbf2516394b4d.zip | |
Convert ARM tests to FileCheck for PR5307.
llvm-svn: 89593
Diffstat (limited to 'llvm/test/CodeGen/ARM/fmscs.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/fmscs.ll | 22 |
1 files changed, 17 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/ARM/fmscs.ll b/llvm/test/CodeGen/ARM/fmscs.ll index 31b5c52d38d..7b9e029b676 100644 --- a/llvm/test/CodeGen/ARM/fmscs.ll +++ b/llvm/test/CodeGen/ARM/fmscs.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | FileCheck %s -check-prefix=NFP1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | FileCheck %s -check-prefix=NFP0 +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 define float @test(float %acc, float %a, float %b) { entry: @@ -11,3 +11,15 @@ entry: ret float %1 } +; VFP2: test: +; VFP2: vnmls.f32 s2, s1, s0 + +; NFP1: test: +; NFP1: vnmls.f32 s2, s1, s0 +; NFP0: test: +; NFP0: vnmls.f32 s2, s1, s0 + +; CORTEXA8: test: +; CORTEXA8: vnmls.f32 s2, s1, s0 +; CORTEXA9: test: +; CORTEXA9: vnmls.f32 s2, s1, s0 |
