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| author | Evan Cheng <evan.cheng@apple.com> | 2010-05-21 00:43:17 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-05-21 00:43:17 +0000 |
| commit | 34c260458ad6a2277e492b1141c71f288fdc0867 (patch) | |
| tree | 45cbe88ef72c42077b16fe0f921fa342de5375fe /llvm/test/CodeGen/ARM/fmscs.ll | |
| parent | 725211e9481e528122cf6410d1454d1fc3db27e0 (diff) | |
| download | bcm5719-llvm-34c260458ad6a2277e492b1141c71f288fdc0867.tar.gz bcm5719-llvm-34c260458ad6a2277e492b1141c71f288fdc0867.zip | |
Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
llvm-svn: 104307
Diffstat (limited to 'llvm/test/CodeGen/ARM/fmscs.ll')
| -rw-r--r-- | llvm/test/CodeGen/ARM/fmscs.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/fmscs.ll b/llvm/test/CodeGen/ARM/fmscs.ll index 7a70543dee6..103ce334519 100644 --- a/llvm/test/CodeGen/ARM/fmscs.ll +++ b/llvm/test/CodeGen/ARM/fmscs.ll @@ -21,4 +21,4 @@ entry: ; CORTEXA8: test: ; CORTEXA8: vnmls.f32 s2, s1, s0 ; CORTEXA9: test: -; CORTEXA9: vnmls.f32 s2, s1, s0 +; CORTEXA9: vnmls.f32 s0, s1, s2 |
