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* lib/Support/CrashRecoveryContext.cpp: Add Win32 support to ↵NAKAMURA Takumi2011-08-201-1/+67
| | | | | | CrashRecoveryContext. Thanks to Aaron Ballman! llvm-svn: 138199
* lib/Support/Windows/Windows.h: Require at least Windows XP(5.1) API. We will ↵NAKAMURA Takumi2011-08-201-2/+2
| | | | | | not support Windows 2000 any more. llvm-svn: 138198
* Cast through intptr_t, ISO C++ requires it.Benjamin Kramer2011-08-201-5/+3
| | | | llvm-svn: 138186
* Remove the VMOVQQ pseudo instruction.Chad Rosier2011-08-203-44/+8
| | | | llvm-svn: 138177
* Remove VMOVQQQQ pseudo instruction.Chad Rosier2011-08-201-2/+0
| | | | llvm-svn: 138174
* Add <imp-def> operands to QQ and QQQQ stack loads.Jakob Stoklund Olesen2011-08-201-2/+4
| | | | | | | | This pleases the register scavenger and brings test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll a little closer to working with -verify-machineinstrs. llvm-svn: 138164
* VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg.Chad Rosier2011-08-202-56/+31
| | | | | | | Therefore, rather then generate a pseudo instruction, which is later expanded, generate the necessary instructions in place. llvm-svn: 138163
* If we're splitting the landing pad block and assigning it only one predecessor,Bill Wendling2011-08-191-26/+40
| | | | | | then don't split it a second time, since that block will be dead. llvm-svn: 138153
* Do not use named md nodes to track variables that are completely optimized. ↵Devang Patel2011-08-193-50/+89
| | | | | | This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly. llvm-svn: 138145
* Thumb parsing and encoding support for NOP.Jim Grosbach2011-08-193-1/+15
| | | | | | The irony is not lost that this is not a completely trivial patchset. llvm-svn: 138143
* Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which is notAkira Hatanaka2011-08-191-14/+9
| | | | | | needed for Mips32. llvm-svn: 138132
* Thumb assembly parsing and encoding for NEG.Jim Grosbach2011-08-191-1/+1
| | | | llvm-svn: 138131
* Roll back the rest of r126557. It's a hack that will break in some obscure ↵Benjamin Kramer2011-08-191-6/+0
| | | | | | cases. llvm-svn: 138130
* Fix NEG aliasJim Grosbach2011-08-191-1/+1
| | | | llvm-svn: 138125
* Be more lenient on tied operand matching for MUL.Jim Grosbach2011-08-191-4/+11
| | | | llvm-svn: 138124
* Re-write part of VEX encoding logic, to be more easy to read! Also fixBruno Cardoso Lopes2011-08-191-58/+82
| | | | | | a bug and add a testcase! llvm-svn: 138123
* Update tests.Jim Grosbach2011-08-191-0/+4
| | | | llvm-svn: 138116
* Thumb assembly parsing and encoding for MUL.Jim Grosbach2011-08-192-5/+41
| | | | llvm-svn: 138108
* The landingpad instruction isn't dead simply because it's value isn't used.Bill Wendling2011-08-191-1/+1
| | | | llvm-svn: 138102
* Eli points out that this is what report_fatal_error() is for.Nick Lewycky2011-08-191-1/+2
| | | | llvm-svn: 138091
* Thumb assembly parsing and encoding for MOV.Jim Grosbach2011-08-193-2/+7
| | | | llvm-svn: 138076
* Tidy up. Tab character.Jim Grosbach2011-08-191-1/+1
| | | | llvm-svn: 138072
* This is not actually unreachable, so don't use llvm_unreachable for it. SinceNick Lewycky2011-08-191-1/+2
| | | | | | | | | | the intent seems to be to terminate even in Release builds, just use abort() directly. If program flow ever reaches a __builtin_unreachable (which llvm_unreachable is #define'd to on newer GCCs) then the program is undefined. llvm-svn: 138068
* Tab characters.Jim Grosbach2011-08-191-2/+2
| | | | llvm-svn: 138066
* Thumb assembly parsing and encoding for LSL(immediate).Jim Grosbach2011-08-192-2/+2
| | | | llvm-svn: 138063
* Thumb assembly parsing and encoding for LDRSB and LDRSH.Jim Grosbach2011-08-191-0/+1
| | | | llvm-svn: 138061
* Thumb assembly parsing and encoding for LDRH.Jim Grosbach2011-08-192-0/+18
| | | | llvm-svn: 138060
* Thumb assembly parsing and encoding for LDRB.Jim Grosbach2011-08-192-0/+18
| | | | llvm-svn: 138059
* Fixed a memory bug in the MCDisassembler whereSean Callanan2011-08-191-1/+5
| | | | | | MCParsedAsmOperand objects were being leaked. llvm-svn: 138053
* Thumb assembly parsing and encoding for LDR(literal).Jim Grosbach2011-08-191-1/+1
| | | | llvm-svn: 138052
* Thumb assembly parsing and encoding for LDR(immediate) form T2.Jim Grosbach2011-08-192-1/+18
| | | | llvm-svn: 138050
* Use helper function to check for low registers.Jim Grosbach2011-08-191-1/+1
| | | | llvm-svn: 138048
* Thumb assembly parsing and encoding for LDR(immediate) form T1.Jim Grosbach2011-08-192-1/+20
| | | | llvm-svn: 138047
* Add explanatory comment.Jim Grosbach2011-08-191-0/+5
| | | | llvm-svn: 138042
* Have SPU backend use the external TCE scheduler, if the library is loaded as aKalle Raiskila2011-08-191-0/+11
| | | | | | | | module. Patch by Pekka Jääskeläinen. llvm-svn: 138037
* Add TB encoding to VEX versions of SSE fp logical operations to fix disassemblerCraig Topper2011-08-191-6/+6
| | | | llvm-svn: 138034
* Fix PR10677. Initial patch and idea by Peter Cooper but I've changed theBruno Cardoso Lopes2011-08-191-3/+8
| | | | | | implementation! llvm-svn: 138029
* Add llc flags to disable machine DCE and CSE.Jakob Stoklund Olesen2011-08-191-2/+8
| | | | | | This is useful for unit tests. llvm-svn: 138028
* Make a bunch of symbols private.Benjamin Kramer2011-08-195-5/+7
| | | | llvm-svn: 138025
* C API functions must be able to see their extern "C" definitions, or it will ↵Benjamin Kramer2011-08-192-0/+2
| | | | | | be impossible to call them from C. llvm-svn: 138022
* Don't treat a partial <def,undef> operand as a read.Jakob Stoklund Olesen2011-08-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | Normally, a partial register def is treated as reading the super-register unless it also defines the full register like this: %vreg110:sub_32bit<def> = COPY %vreg77:sub_32bit, %vreg110<imp-def> This patch also uses the <undef> flag on partial defs to recognize non-reading operands: %vreg110:sub_32bit<def,undef> = COPY %vreg77:sub_32bit This fixes a subtle bug in RegisterCoalescer where LIS->shrinkToUses would treat a coalesced copy as still reading the register, extending the live range artificially. My test case only works when I disable DCE so a dead copy is left for RegisterCoalescer, so I am not including it. <rdar://problem/9967101> llvm-svn: 138018
* Track a retain+release nesting level independently of theDan Gohman2011-08-191-36/+64
| | | | | | | | known-incremented level, because the two concepts can be used to prove the saftey of a retain+release removal in different ways. llvm-svn: 138016
* Intelligently split the landing pad block.Bill Wendling2011-08-191-5/+16
| | | | | | | | | | We have to be careful when splitting the landing pad block, because the landingpad instruction is required to remain as the first non-PHI of an invoke's unwind edge. To retain this, we split the block into two blocks, moving the predecessors within the loop to one block and the remaining predecessors to the other. The landingpad instruction is cloned into the new blocks. llvm-svn: 138015
* Add SplitLandingPadPredecessors().Bill Wendling2011-08-191-1/+95
| | | | | | | | | | | | | | | | SplitLandingPadPredecessors is similar to SplitBlockPredecessors in that it splits the current block and attaches a set of predecessors to the new basic block. However, it differs from SplitBlockPredecessors in that it's specifically designed to handle landing pad blocks. Two new basic blocks are created: one that is has the vector of predecessors as its predecessors and one that has the remaining predecessors as its predecessors. Those two new blocks then receive a cloned copy of the landingpad instruction from the original block. The landingpad instructions are joined in a PHI, etc. Like SplitBlockPredecessors, it updates the LLVM IR, AliasAnalysis, DominatorTree, DominanceFrontier, LoopInfo, and LCCSA analyses. llvm-svn: 138014
* Re-encoded 128-bit AVX versions of SQRT, RSQRT, RCP have 3 operandsBruno Cardoso Lopes2011-08-181-31/+64
| | | | | | | | | | | | | | | | | | instead of 2. They were already defined this way in their regular version, but not for the intrinsics versions (*_Int), and that would work for assembly emission but not for object code, since a MachineOperand would be missing. This commit fix PR10697. Also removed the {VSQRT,VRSQRT,VRCP}r_Int forms and match the intrinsic via INSERT_SUBREG+EXTRACT_SUBREG patterns. The same couldn't be done for memory versions because sse_load_f32/sse_load_f64 operand need special handling and don't work like regular "addr" operands. There are right now 114 "*_Int" and 98 "Int_*" forms! I'm slowly removing them as I step through, but hope we can get rid of these someday, they are really annoying :) llvm-svn: 138012
* There is no need to add file as context for subroutine type. The subroutine ↵Devang Patel2011-08-181-2/+2
| | | | | | type does not need any context. llvm-svn: 138010
* add the comments of each declaration follow it, making it easier to read and ↵Renato Golin2011-08-181-49/+44
| | | | | | compare to GCC's result. llvm-svn: 138009
* Use 'getFirstInsertionPt' when trying to insert new instructions during LICM.Bill Wendling2011-08-181-3/+3
| | | | llvm-svn: 138008
* Use subword loads instead of a 4-byte load when the size of a structure (or aAkira Hatanaka2011-08-181-26/+73
| | | | | | piece of it) that is being passed by value is smaller than a word. llvm-svn: 138007
* Eliminate unnecessary forwarding function.Devang Patel2011-08-183-19/+6
| | | | llvm-svn: 138006
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