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| author | Jim Grosbach <grosbach@apple.com> | 2011-08-19 19:29:25 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-19 19:29:25 +0000 |
| commit | 5503c3a4e866360cf939ef02457000eb8856f19e (patch) | |
| tree | 7af86f683faf53c4662964433814febf558e0582 /llvm/lib | |
| parent | 7e47de3156b038aa0bd5f215aaa6886a1a7ea8a9 (diff) | |
| download | bcm5719-llvm-5503c3a4e866360cf939ef02457000eb8856f19e.tar.gz bcm5719-llvm-5503c3a4e866360cf939ef02457000eb8856f19e.zip | |
Thumb assembly parsing and encoding for LSL(immediate).
llvm-svn: 138063
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td index 63d8b48734e..b19cccbd992 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb.td @@ -970,7 +970,7 @@ def tEOR : // A8.6.45 // LSL immediate def tLSLri : // A8.6.88 - T1sIGenEncodeImm<{0,0,0,?,?}, (outs tGPR:$Rd), (ins tGPR:$Rm, i32imm:$imm5), + T1sIGenEncodeImm<{0,0,0,?,?}, (outs tGPR:$Rd), (ins tGPR:$Rm, imm0_31:$imm5), IIC_iMOVsi, "lsl", "\t$Rd, $Rm, $imm5", [(set tGPR:$Rd, (shl tGPR:$Rm, (i32 imm:$imm5)))]> { diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 60f16f83625..7197b99b25b 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -2728,7 +2728,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic, // predicated but do have a carry-set and so weren't caught above. if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" && Mnemonic != "muls" && Mnemonic != "smlals" && Mnemonic != "smulls" && - Mnemonic != "umlals" && Mnemonic != "umulls") { + Mnemonic != "umlals" && Mnemonic != "umulls" && Mnemonic != "lsls") { unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2)) .Case("eq", ARMCC::EQ) .Case("ne", ARMCC::NE) |
