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authorJim Grosbach <grosbach@apple.com>2011-08-19 23:24:36 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-19 23:24:36 +0000
commit2597722e07f07e60fdd3a6509f2b984e4c556276 (patch)
tree0e7f98db0f9beb89b9a643f3b0b97e2365c80535 /llvm/lib
parent071a89c39f42beaecf78ffec1bc5c60a14a18816 (diff)
downloadbcm5719-llvm-2597722e07f07e60fdd3a6509f2b984e4c556276.tar.gz
bcm5719-llvm-2597722e07f07e60fdd3a6509f2b984e4c556276.zip
Thumb parsing and encoding support for NOP.
The irony is not lost that this is not a completely trivial patchset. llvm-svn: 138143
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb.td8
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp1
-rw-r--r--llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp7
3 files changed, 15 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 197afeb11fd..a151c0dfaaf 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -237,7 +237,8 @@ class T1SystemEncoding<bits<8> opc>
}
def tNOP : T1pI<(outs), (ins), NoItinerary, "nop", "", []>,
- T1SystemEncoding<0x00>; // A8.6.110
+ T1SystemEncoding<0x00>, // A8.6.110
+ Requires<[IsThumb2]>;
def tYIELD : T1pI<(outs), (ins), NoItinerary, "yield", "", []>,
T1SystemEncoding<0x10>; // A8.6.410
@@ -1382,3 +1383,8 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
2, IIC_Br, [(brind GPR:$Rm)],
(tMOVr PC, GPR:$Rm, pred:$p)>;
}
+
+
+// In Thumb1, "nop" is encoded as a "mov r8, r8". Technically, the bf00
+// encoding is available on ARMv6K, but we don't differentiate that finely.
+def : InstAlias<"nop", (tMOVr R8, R8, 14, 0)>,Requires<[IsThumb, IsThumb1Only]>;
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 6a14387640e..3e768f25317 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2846,6 +2846,7 @@ getMnemonicAcceptInfo(StringRef Mnemonic, bool &CanAcceptCarrySet,
Mnemonic == "trap" || Mnemonic == "mrc2" || Mnemonic == "mrrc2" ||
Mnemonic == "dsb" || Mnemonic == "isb" || Mnemonic == "clrex" ||
Mnemonic == "setend" ||
+ (Mnemonic == "nop" && isThumbOne()) ||
((Mnemonic == "pld" || Mnemonic == "pli") && !isThumb()) ||
((Mnemonic.startswith("rfe") || Mnemonic.startswith("srs"))
&& !isThumb()) ||
diff --git a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 1999ee7a6f5..153f68d62c8 100644
--- a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -169,6 +169,13 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
return;
}
+ // Thumb1 NOP
+ if (Opcode == ARM::tMOVr && MI->getOperand(0).getReg() == ARM::R8 &&
+ MI->getOperand(1).getReg() == ARM::R8) {
+ O << "\tnop";
+ return;
+ }
+
printInstruction(MI, O);
}
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