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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-08-20 00:17:45 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-08-20 00:17:45 +0000 |
| commit | 59015c8b17f82693f7d747fc9b890caf21534e95 (patch) | |
| tree | 3d9ed6df8aef65589b538ce066ae58b88e7e4cf2 /llvm/lib | |
| parent | be7625161ecc2157ef46a8ba0bd20dd39e55adf8 (diff) | |
| download | bcm5719-llvm-59015c8b17f82693f7d747fc9b890caf21534e95.tar.gz bcm5719-llvm-59015c8b17f82693f7d747fc9b890caf21534e95.zip | |
Add <imp-def> operands to QQ and QQQQ stack loads.
This pleases the register scavenger and brings
test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll a little closer to
working with -verify-machineinstrs.
llvm-svn: 138164
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 666e0989d9d..f6ec87f1e6e 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -930,7 +930,8 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MIB = AddDReg(MIB, DestReg, ARM::dsub_0, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_1, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_2, RegState::Define, TRI); - AddDReg(MIB, DestReg, ARM::dsub_3, RegState::Define, TRI); + MIB = AddDReg(MIB, DestReg, ARM::dsub_3, RegState::Define, TRI); + MIB.addReg(DestReg, RegState::Define | RegState::Implicit); } } else llvm_unreachable("Unknown reg class!"); @@ -948,7 +949,8 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MIB = AddDReg(MIB, DestReg, ARM::dsub_4, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_5, RegState::Define, TRI); MIB = AddDReg(MIB, DestReg, ARM::dsub_6, RegState::Define, TRI); - AddDReg(MIB, DestReg, ARM::dsub_7, RegState::Define, TRI); + MIB = AddDReg(MIB, DestReg, ARM::dsub_7, RegState::Define, TRI); + MIB.addReg(DestReg, RegState::Define | RegState::Implicit); } else llvm_unreachable("Unknown reg class!"); break; |
