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* [PowerPC] Convert a README.txt entry into a better testHal Finkel2015-01-051-13/+0
* Use the integrated assembler by default on 32-bit PowerPC and SPARCBrad Smith2015-01-052-4/+2
* [PowerPC] Remove README.txt entryHal Finkel2015-01-051-34/+0
* [Hexagon] Adding add/sub with carry, logical shift left by immediate and memo...Colin LeMahieu2015-01-052-226/+124
* [PowerPC] Add a test for truncating a shifted loadHal Finkel2015-01-051-18/+0
* Make DIE.h a public CodeGen header.Frederic Riss2015-01-059-595/+8
* [PowerPC] Add another test for load/store with updateHal Finkel2015-01-051-34/+0
* [PowerPC] Fold i1 extensions with other opsHal Finkel2015-01-052-17/+71
* [X86][SSE] Fixed description for isSequentialOrUndefInRange. NFC.Simon Pilgrim2015-01-051-1/+1
* [Hexagon] Adding rounding reg/reg variants, accumulating multiplies, and accu...Colin LeMahieu2015-01-051-57/+170
* IR: Prune arguments to ValueAsMetadata::ValueAsMetadata()Duncan P. N. Exon Smith2015-01-051-2/+2
* [Hexagon] Adding V4 bit manipulating instructions, removing ALU defs without ...Colin LeMahieu2015-01-051-251/+104
* [Hexagon] Adding V4 logic-logic instructions and tests.Colin LeMahieu2015-01-051-0/+55
* [Hexagon] Adding orand, bitsplit reg/reg, and modwrap instructions.Colin LeMahieu2015-01-051-0/+57
* [PowerPC] Remove zexts after i32 ctlzHal Finkel2015-01-052-1/+11
* [PowerPC] Remove zexts after byte-swapping loadsHal Finkel2015-01-052-0/+16
* [Hexagon] Adding round reg/imm and bitsplit instructions.Colin LeMahieu2015-01-052-0/+21
* SymbolRewriter: use iplist::spliceSaleem Abdulrasool2015-01-051-1/+1
* SymbolRewriter: 80-columnSaleem Abdulrasool2015-01-051-2/+4
* [AArch64] Improve codegen of store lane instructions by avoiding GPR usage.Ahmed Bougacha2015-01-051-2/+2
* [AArch64] Improve codegen of store lane 0 instructions by directly storing th...Ahmed Bougacha2015-01-051-0/+27
* Select lower fsub,fabs pattern to fabd on AArch64Karthik Bhat2015-01-051-0/+12
* Parse Tag_compatibility correctly.Charlie Turner2015-01-051-2/+7
* Emit the build attribute Tag_conformance.Charlie Turner2015-01-052-1/+15
* Select lower sub,abs pattern to sabd on AArch64Karthik Bhat2015-01-051-0/+27
* [PM] Don't run the machinery of invalidating all the analysis passesChandler Carruth2015-01-052-0/+12
* [PM] Add names and debug logging for analysis passes to the new passChandler Carruth2015-01-052-4/+45
* Replace several 'assert(false' with 'llvm_unreachable' or fold a condition in...Craig Topper2015-01-0516-56/+38
* Fixed a bug in memory dependence checking module of loop vectorization. The f...Jiangning Liu2015-01-051-48/+57
* [X86] Remove the predicates from the register forms of the 2-byte inc and dec...Craig Topper2015-01-052-44/+24
* [X86] Simplify code a little by just summing flags instead of conditionally i...Craig Topper2015-01-051-18/+7
* [X86] Remove unnecessary redeclaration of a variable with the same assignment...Craig Topper2015-01-051-1/+0
* [X86] Remove a strange fixme referring to a hack that doesn't seem to exist s...Craig Topper2015-01-051-3/+0
* [x86] Reduce text duplication for similar operand class declarations in table...Craig Topper2015-01-051-268/+178
* [X86] Fix the immediate size to match the address size in the operand types f...Craig Topper2015-01-051-7/+7
* [PowerPC] Enable speculation of cttz/ctlzHal Finkel2015-01-051-0/+8
* [SROA] Apply a somewhat heavy and unpleasant hammer to fix PR22093, anChandler Carruth2015-01-051-11/+47
* [PowerPC] Materialize i64 constants using rotation with maskingHal Finkel2015-01-052-26/+51
* [PM] Switch the new pass manager to use a reference-based API for IRChandler Carruth2015-01-056-55/+54
* [PM] Cleanup a const_cast and other machinery left over in this codeChandler Carruth2015-01-041-2/+1
* [PowerPC] Materialize i64 constants using rotationHal Finkel2015-01-042-29/+29
* Fix unused variable warning for non-asserts builds. NFC.Michael Kuperstein2015-01-041-2/+2
* [PowerPC] Materialize i64 constants using bit inversionHal Finkel2015-01-041-2/+30
* [PM] Split the AssumptionTracker immutable pass into two separate APIs:Chandler Carruth2015-01-0449-724/+764
* InstCombine: match can find ConstantExprs, don't assume we have a ValueDavid Majnemer2015-01-041-2/+2
* ValueTracking: ComputeNumSignBits should tolerate misshapen phi nodesDavid Majnemer2015-01-041-2/+5
* [APFloat][ADT] Fix sign handling logic for FMA results that truncate to zero.Lang Hames2015-01-041-1/+1
* ARM: permit tail calls to weak externals on COFFSaleem Abdulrasool2015-01-032-2/+6
* [PowerPC/BlockPlacement] Allow target to provide a per-loop alignment preferenceHal Finkel2015-01-033-3/+41
* [PowerPC] Use 16-byte alignment for modern cores for functions/loopsHal Finkel2015-01-032-4/+45
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