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author | Craig Topper <craig.topper@gmail.com> | 2015-01-05 08:18:59 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2015-01-05 08:18:59 +0000 |
commit | 21f984966df619abbc9cff82d4dc692d7360420e (patch) | |
tree | 282af13c029fa9879fca1a17b650a044868ed05e /llvm/lib | |
parent | 62c0525b11572ed0ac4c8061133d2a85a72fe805 (diff) | |
download | bcm5719-llvm-21f984966df619abbc9cff82d4dc692d7360420e.tar.gz bcm5719-llvm-21f984966df619abbc9cff82d4dc692d7360420e.zip |
[X86] Fix the immediate size to match the address size in the operand types for the move to/from absolute memory instructions.
llvm-svn: 225152
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 5a9b51aa0cc..46fb4d2e3c7 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -554,31 +554,31 @@ def dstidx64 : Operand<iPTR> { let PrintMethod = "printDstIdx64"; } def offset16_8 : Operand<iPTR> { let ParserMatchClass = X86MemOffs16_8AsmOperand; - let MIOperandInfo = (ops i64imm, i8imm); + let MIOperandInfo = (ops i16imm, i8imm); let PrintMethod = "printMemOffs8"; } def offset16_16 : Operand<iPTR> { let ParserMatchClass = X86MemOffs16_16AsmOperand; - let MIOperandInfo = (ops i64imm, i8imm); + let MIOperandInfo = (ops i16imm, i8imm); let PrintMethod = "printMemOffs16"; } def offset16_32 : Operand<iPTR> { let ParserMatchClass = X86MemOffs16_32AsmOperand; - let MIOperandInfo = (ops i64imm, i8imm); + let MIOperandInfo = (ops i16imm, i8imm); let PrintMethod = "printMemOffs32"; } def offset32_8 : Operand<iPTR> { let ParserMatchClass = X86MemOffs32_8AsmOperand; - let MIOperandInfo = (ops i64imm, i8imm); + let MIOperandInfo = (ops i32imm, i8imm); let PrintMethod = "printMemOffs8"; } def offset32_16 : Operand<iPTR> { let ParserMatchClass = X86MemOffs32_16AsmOperand; - let MIOperandInfo = (ops i64imm, i8imm); + let MIOperandInfo = (ops i32imm, i8imm); let PrintMethod = "printMemOffs16"; } def offset32_32 : Operand<iPTR> { let ParserMatchClass = X86MemOffs32_32AsmOperand; - let MIOperandInfo = (ops i64imm, i8imm); + let MIOperandInfo = (ops i32imm, i8imm); let PrintMethod = "printMemOffs32"; } def offset32_64 : Operand<iPTR> { let ParserMatchClass = X86MemOffs32_64AsmOperand; - let MIOperandInfo = (ops i64imm, i8imm); + let MIOperandInfo = (ops i32imm, i8imm); let PrintMethod = "printMemOffs64"; } def offset64_8 : Operand<iPTR> { let ParserMatchClass = X86MemOffs64_8AsmOperand; |