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authorBrad Smith <brad@comstyle.com>2015-01-05 21:48:16 +0000
committerBrad Smith <brad@comstyle.com>2015-01-05 21:48:16 +0000
commit9cf1e26201635c75b3ff5ab2f521f380027a3a8c (patch)
tree569c2c0a6d6d7e0fe774e5291f00d4f4005ea3d0 /llvm/lib
parenta2e3e368e7cec745a12e71c44d4b85ec57f6411a (diff)
downloadbcm5719-llvm-9cf1e26201635c75b3ff5ab2f521f380027a3a8c.tar.gz
bcm5719-llvm-9cf1e26201635c75b3ff5ab2f521f380027a3a8c.zip
Use the integrated assembler by default on 32-bit PowerPC and SPARC
llvm-svn: 225213
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp3
-rw-r--r--llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp3
2 files changed, 2 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index 1be7b482b6a..2b4f2d81db8 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -74,7 +74,6 @@ PPCELFMCAsmInfo::PPCELFMCAsmInfo(bool is64Bit, const Triple& T) {
AssemblerDialect = 1; // New-Style mnemonics.
LCOMMDirectiveAlignmentType = LCOMM::ByteAlignment;
- if (T.isOSFreeBSD() || ((T.isOSNetBSD() || T.isOSOpenBSD()) && !is64Bit))
- UseIntegratedAssembler = true;
+ UseIntegratedAssembler = true;
}
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
index 42690206e8c..6767e4b224f 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
@@ -42,8 +42,7 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(StringRef TT) {
SunStyleELFSectionSwitchSyntax = true;
UsesELFSectionDirectiveForBSS = true;
- if (TheTriple.isOSSolaris() || TheTriple.isOSOpenBSD())
- UseIntegratedAssembler = true;
+ UseIntegratedAssembler = true;
}
const MCExpr*
OpenPOWER on IntegriCloud