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| author | Karthik Bhat <kv.bhat@samsung.com> | 2015-01-05 13:57:59 +0000 |
|---|---|---|
| committer | Karthik Bhat <kv.bhat@samsung.com> | 2015-01-05 13:57:59 +0000 |
| commit | 93f27ce886e1d061f8fef8b0d690aa680f3c4b8a (patch) | |
| tree | ba2e5e8f019b5cbc2e6fb861a5e7066608bac3a1 /llvm/lib | |
| parent | 7a45e8794fcc06c7b7a7a89b3cf0cb7e4e12a116 (diff) | |
| download | bcm5719-llvm-93f27ce886e1d061f8fef8b0d690aa680f3c4b8a.tar.gz bcm5719-llvm-93f27ce886e1d061f8fef8b0d690aa680f3c4b8a.zip | |
Select lower fsub,fabs pattern to fabd on AArch64
This patch lowers patterns such as-
fsub v0.4s, v0.4s, v1.4s
fabs v0.4s, v0.4s
to
fabd v0.4s, v0.4s, v1.4s
on AArch64.
Review: http://reviews.llvm.org/D6791
llvm-svn: 225169
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index 7f914797e37..f4a555499d2 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -2760,6 +2760,13 @@ def : Pat<(xor (v4i32 (AArch64vashr (v4i32(sub V128:$Rn, V128:$Rm)), (i32 31))), (AArch64vashr (v4i32(sub V128:$Rn, V128:$Rm)), (i32 31))))), (SABDv4i32 V128:$Rn, V128:$Rm)>; +def : Pat<(v2f32 (fabs (fsub V64:$Rn, V64:$Rm))), + (FABDv2f32 V64:$Rn, V64:$Rm)>; +def : Pat<(v4f32 (fabs (fsub V128:$Rn, V128:$Rm))), + (FABDv4f32 V128:$Rn, V128:$Rm)>; +def : Pat<(v2f64 (fabs (fsub V128:$Rn, V128:$Rm))), + (FABDv2f64 V128:$Rn, V128:$Rm)>; + def : Pat<(AArch64bsl (v8i8 V64:$Rd), V64:$Rn, V64:$Rm), (BSLv8i8 V64:$Rd, V64:$Rn, V64:$Rm)>; def : Pat<(AArch64bsl (v4i16 V64:$Rd), V64:$Rn, V64:$Rm), @@ -3049,6 +3056,11 @@ defm UQXTN : SIMDTwoScalarMixedBHS<1, 0b10100, "uqxtn", int_aarch64_neon_scalar defm USQADD : SIMDTwoScalarBHSDTied< 1, 0b00011, "usqadd", int_aarch64_neon_usqadd>; +def : Pat<(f32 (fabs (fsub FPR32:$Rn, FPR32:$Rm))), + (FABD32 FPR32:$Rn, FPR32:$Rm)>; +def : Pat<(f64 (fabs (fsub FPR64:$Rn, FPR64:$Rm))), + (FABD64 FPR64:$Rn, FPR64:$Rm)>; + def : Pat<(AArch64neg (v1i64 V64:$Rn)), (NEGv1i64 V64:$Rn)>; def : Pat<(v1i64 (int_aarch64_neon_fcvtas (v1f64 FPR64:$Rn))), |
