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| author | Oliver Stannard <oliver.stannard@arm.com> | 2015-11-16 10:25:19 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2015-11-16 10:25:19 +0000 |
| commit | db9081bf89aa2b603d660896bd6f933a5f011e3b (patch) | |
| tree | f92c28b0b242a0be7b89d7fdedd6b32f0389deb8 /llvm/lib/Target | |
| parent | d4d2357f266ef563e6609ad00d2524ec7de91826 (diff) | |
| download | bcm5719-llvm-db9081bf89aa2b603d660896bd6f933a5f011e3b.tar.gz bcm5719-llvm-db9081bf89aa2b603d660896bd6f933a5f011e3b.zip | |
[AArch64] ldr= pseudo-instruction silently ignored if register invalid
The AArch64 assembler was silently ignoring instructions like this:
ldr foo, =bar
AArch64AsmParser::parseOperand was returning true as the parse failed, but was
not calling AArch64AsmParser::Error to report this to the user, so the
instruction was ignored without printing an error message.
Differential Revision: http://reviews.llvm.org/D14651
llvm-svn: 253193
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index 278c4b8f489..a1f32e099e3 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3178,7 +3178,7 @@ bool AArch64AsmParser::parseOperand(OperandVector &Operands, bool isCondCode, if (Operands.size() < 2 || !static_cast<AArch64Operand &>(*Operands[1]).isReg()) - return true; + return Error(Loc, "Only valid when first operand is register"); bool IsXReg = AArch64MCRegisterClasses[AArch64::GPR64allRegClassID].contains( |
