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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2015-11-17 16:45:40 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2015-11-17 16:45:40 +0000
commit88ddeae8bda08376ddb05e47c5e5ca6f83454131 (patch)
treeec4d2f1d6d7b7439fda0cd2f03dbbd7945004d8a /llvm/lib/Target
parentaf08e1bdf053f0a4e385bd2889d06ce546f514de (diff)
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[AArch64] Promote f16 SELECT_CC CC operands when op is legal.
SELECT_CC has the nasty property of having operands with unrelated types. So if you do something like: f32 = select_cc f16, f16, f32, f32, cc You'd only look for the action for <select_cc, f32>, but never f16. If the types are all legal, but the op isn't (as for f16 on AArch64, or for f128 on x86_64/AArch64?), then you get into trouble. For f128, we have softenSetCCOperands to handle this case. Similarly, for f16, we can directly promote the CC operands. llvm-svn: 253344
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelLowering.cpp8
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 14d2f6fb61a..26f03ef765d 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3887,7 +3887,13 @@ SDValue AArch64TargetLowering::LowerSELECT_CC(ISD::CondCode CC, SDValue LHS,
}
}
- // Handle integers first.
+ // Also handle f16, for which we need to do a f32 comparison.
+ if (LHS.getValueType() == MVT::f16) {
+ LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, LHS);
+ RHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f32, RHS);
+ }
+
+ // Next, handle integers.
if (LHS.getValueType().isInteger()) {
assert((LHS.getValueType() == RHS.getValueType()) &&
(LHS.getValueType() == MVT::i32 || LHS.getValueType() == MVT::i64));
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