| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips][mips64r6] jalx is not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 | 2 | -4/+5 |
| * | [mips][mips64r6] Add R_MIPS_PC19_S2 | Zoran Jovanovic | 2014-06-12 | 5 | -5/+31 |
| * | [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 2014-06-12 | 3 | -17/+46 |
| * | [mips][mips64r6] Add bgec and bgeuc instructions | Zoran Jovanovic | 2014-06-12 | 2 | -6/+68 |
| * | [X86] Teach how to dump the name of target node RDTSCP_DAG. | Andrea Di Biagio | 2014-06-12 | 1 | -0/+1 |
| * | [mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not ava... | Daniel Sanders | 2014-06-12 | 3 | -13/+15 |
| * | [mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 | 3 | -11/+20 |
| * | [X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit ve... | Andrea Di Biagio | 2014-06-12 | 1 | -9/+103 |
| * | [mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, d... | Daniel Sanders | 2014-06-12 | 7 | -60/+134 |
| * | R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec* | Matt Arsenault | 2014-06-12 | 2 | -41/+29 |
| * | [FastISel][X86] Add support for the sqrt intrinsic. | Juergen Ributzka | 2014-06-11 | 1 | -0/+52 |
| * | [FastIsel][X86] Add support for lowering the first 8 floating-point arguments. | Juergen Ributzka | 2014-06-11 | 1 | -19/+36 |
| * | [FastISel][X86] Add support for the frameaddress intrinsic. | Juergen Ributzka | 2014-06-11 | 1 | -0/+52 |
| * | [AArch64] Basic Sched Model for Cortex-A57. | Chad Rosier | 2014-06-11 | 3 | -1/+818 |
| * | R600: Set correct InstrItinClass for instructions using *Helper classes | Tom Stellard | 2014-06-11 | 1 | -3/+3 |
| * | R600: BCNT_INT is a vector only instruction | Tom Stellard | 2014-06-11 | 1 | -1/+1 |
| * | ARM: honor hex immediate formatting for ldr/str i12 offsets. | Jim Grosbach | 2014-06-11 | 1 | -2/+2 |
| * | R600/SI: Fix bitcast between v2i32 and f64 | Matt Arsenault | 2014-06-11 | 1 | -0/+2 |
| * | R600/SI: Update place using old subtarget predicate | Matt Arsenault | 2014-06-11 | 1 | -2/+2 |
| * | R600/SI: Add common 64-bit LDS atomics | Matt Arsenault | 2014-06-11 | 3 | -17/+43 |
| * | R600/SI: Add instruction definitions for 64-bit LDS atomics | Matt Arsenault | 2014-06-11 | 1 | -0/+47 |
| * | R600/SI: Add 32-bit LDS atomic cmpxchg | Matt Arsenault | 2014-06-11 | 2 | -0/+24 |
| * | R600/SI: Use LDS atomic inc / dec | Matt Arsenault | 2014-06-11 | 1 | -0/+16 |
| * | R600/SI: Add other LDS atomic operations | Matt Arsenault | 2014-06-11 | 1 | -3/+12 |
| * | R600/SI: Add instruction definitions for more LDS ops | Matt Arsenault | 2014-06-11 | 2 | -0/+104 |
| * | R600/SI: Fix backwards names for local atomic instructions. | Matt Arsenault | 2014-06-11 | 1 | -4/+4 |
| * | R600/SI: Refactor local atomics. | Matt Arsenault | 2014-06-11 | 2 | -11/+30 |
| * | R600/SI: Use v_cvt_f32_ubyte* instructions | Matt Arsenault | 2014-06-11 | 7 | -5/+170 |
| * | R600/SI: Fix selection failure on scalar_to_vector | Matt Arsenault | 2014-06-11 | 2 | -6/+23 |
| * | X86: add stringy name for X86ISD::LCMPXCHG16_DAG | Tim Northover | 2014-06-11 | 1 | -0/+1 |
| * | [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register ... | Matheus Almeida | 2014-06-11 | 5 | -1/+121 |
| * | Add AVX512 masked leadz instrinsic support. | Cameron McInally | 2014-06-11 | 1 | -0/+22 |
| * | [X86] Refactor the logic to select horizontal adds/subs to a helper function. | Andrea Di Biagio | 2014-06-11 | 1 | -90/+118 |
| * | Try to fix the msvc build. | Rafael Espindola | 2014-06-11 | 1 | -1/+2 |
| * | Use cast instead of assert + dyn_cast | Matt Arsenault | 2014-06-11 | 1 | -3/+2 |
| * | R600: Add helper functions. | Matt Arsenault | 2014-06-11 | 2 | -0/+21 |
| * | Remove duplicate copy of InstrItineraryData from the TargetMachine, | Eric Christopher | 2014-06-11 | 2 | -13/+8 |
| * | Move to a private function to initialize the subtarget dependencies | Eric Christopher | 2014-06-11 | 2 | -11/+20 |
| * | Move to a private function to initialize the subtarget dependencies | Eric Christopher | 2014-06-11 | 2 | -22/+25 |
| * | [FastISel][X86] Extend support for {s|u}{add|sub|mul}.with.overflow intrinsics. | Juergen Ributzka | 2014-06-10 | 1 | -30/+89 |
| * | Use unique_ptr for X86Subtarget pointer members. | Eric Christopher | 2014-06-10 | 2 | -22/+16 |
| * | Move AArch64TargetLowering to AArch64Subtarget. | Eric Christopher | 2014-06-10 | 6 | -9/+13 |
| * | Move AArch64InstrInfo to AArch64Subtarget. | Eric Christopher | 2014-06-10 | 4 | -6/+9 |
| * | Remove a method that was just replacing direct access to a member. | Eric Christopher | 2014-06-10 | 2 | -20/+18 |
| * | Remove the use of TargetMachine from X86InstrInfo. | Eric Christopher | 2014-06-10 | 3 | -61/+60 |
| * | Move X86RegisterInfo away from using the TargetMachine and only | Eric Christopher | 2014-06-10 | 5 | -33/+30 |
| * | Use the TargetMachine on the DAG or the MachineFunction instead | Eric Christopher | 2014-06-10 | 1 | -82/+80 |
| * | R600/SI: Emit an error when attempting to spill VGPRs v4 | Tom Stellard | 2014-06-10 | 1 | -10/+24 |
| * | R600/SI: Fix a crash when spilling SGPRs | Tom Stellard | 2014-06-10 | 2 | -11/+8 |
| * | R600: Use BCNT_INT for evergreen | Matt Arsenault | 2014-06-10 | 4 | -5/+16 |
