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authorTom Stellard <thomas.stellard@amd.com>2014-06-11 20:51:42 +0000
committerTom Stellard <thomas.stellard@amd.com>2014-06-11 20:51:42 +0000
commit4a9cea608c5104ec1ae01d048cc44ac7b26806a3 (patch)
tree2944507d30b03571b18bd24cf31ec0b60769cb09 /llvm/lib/Target
parent3fe21f8afa27a12a8afcfc316a9d3c10191a8fa7 (diff)
downloadbcm5719-llvm-4a9cea608c5104ec1ae01d048cc44ac7b26806a3.tar.gz
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R600: Set correct InstrItinClass for instructions using *Helper classes
We weren't doing this before, so all instruction using the *Helper classes were considered for any ALU slot. This fixes a hang in the builtin-char-clz-1.0.generated.cl piglit test. llvm-svn: 210703
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/R600/R600Instructions.td6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/R600/R600Instructions.td b/llvm/lib/Target/R600/R600Instructions.td
index 590fde20293..0e68ad82e11 100644
--- a/llvm/lib/Target/R600/R600Instructions.td
+++ b/llvm/lib/Target/R600/R600Instructions.td
@@ -125,7 +125,7 @@ class R600_1OP <bits<11> inst, string opName, list<dag> pattern,
class R600_1OP_Helper <bits<11> inst, string opName, SDPatternOperator node,
InstrItinClass itin = AnyALU> :
R600_1OP <inst, opName,
- [(set R600_Reg32:$dst, (node R600_Reg32:$src0))]
+ [(set R600_Reg32:$dst, (node R600_Reg32:$src0))], itin
>;
// If you add or change the operands for R600_2OP instructions, you must
@@ -161,10 +161,10 @@ class R600_2OP <bits<11> inst, string opName, list<dag> pattern,
}
class R600_2OP_Helper <bits<11> inst, string opName, SDPatternOperator node,
- InstrItinClass itim = AnyALU> :
+ InstrItinClass itin = AnyALU> :
R600_2OP <inst, opName,
[(set R600_Reg32:$dst, (node R600_Reg32:$src0,
- R600_Reg32:$src1))]
+ R600_Reg32:$src1))], itin
>;
// If you add our change the operands for R600_3OP instructions, you must
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