| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips][mips64r6] jalx is not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 | 2 | -4/+5 |
| * | [mips][mips64r6] Add R_MIPS_PC19_S2 | Zoran Jovanovic | 2014-06-12 | 5 | -5/+31 |
| * | Don't import make_error_code into the llvm namespace. | Rafael Espindola | 2014-06-12 | 5 | -10/+10 |
| * | [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 2014-06-12 | 3 | -17/+46 |
| * | [mips][mips64r6] Add bgec and bgeuc instructions | Zoran Jovanovic | 2014-06-12 | 2 | -6/+68 |
| * | [X86] Teach how to dump the name of target node RDTSCP_DAG. | Andrea Di Biagio | 2014-06-12 | 1 | -0/+1 |
| * | [mips][mips64r6] madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not ava... | Daniel Sanders | 2014-06-12 | 3 | -13/+15 |
| * | [mips][mips64r6] madd/maddu/msub/msubu are not available on MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-12 | 3 | -11/+20 |
| * | [X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit ve... | Andrea Di Biagio | 2014-06-12 | 1 | -9/+103 |
| * | [mips][mips64r6] Replace m[tf]hi, m[tf]lo, mult, multu, dmult, dmultu, div, d... | Daniel Sanders | 2014-06-12 | 7 | -60/+134 |
| * | R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec* | Matt Arsenault | 2014-06-12 | 2 | -41/+29 |
| * | [FastISel] Add support for the stackmap intrinsic. | Juergen Ributzka | 2014-06-12 | 1 | -0/+102 |
| * | Prefix generic_category with std::. | Rafael Espindola | 2014-06-12 | 1 | -2/+2 |
| * | Don't put generic_category in the llvm namespace. | Rafael Espindola | 2014-06-12 | 5 | -30/+30 |
| * | Fix verifier for GlobalAliases to avoid recursing into global initializers. | Bob Wilson | 2014-06-12 | 1 | -0/+4 |
| * | Don't import error_category into the llvm namespace. | Rafael Espindola | 2014-06-12 | 4 | -7/+7 |
| * | Don't import error_condition into the llvm namespace. | Rafael Espindola | 2014-06-12 | 2 | -5/+8 |
| * | Used mapWindowsError. I missed these in the initial transition. | Rafael Espindola | 2014-06-12 | 1 | -3/+4 |
| * | Try to fix the mingw build. | Rafael Espindola | 2014-06-12 | 1 | -30/+6 |
| * | Do not register and de-register PassRegistrationListeners during | Zachary Turner | 2014-06-12 | 1 | -12/+10 |
| * | Teach LoopUnrollPass to respect loop unrolling hints in metadata. | Eli Bendersky | 2014-06-11 | 1 | -6/+109 |
| * | [FastISel][X86] Add support for the sqrt intrinsic. | Juergen Ributzka | 2014-06-11 | 1 | -0/+52 |
| * | [FastIsel][X86] Add support for lowering the first 8 floating-point arguments. | Juergen Ributzka | 2014-06-11 | 1 | -19/+36 |
| * | Don't acquire the mutex during the destructor of PassRegistry. | Zachary Turner | 2014-06-11 | 1 | -1/+4 |
| * | Implement get_magic with generic tools and inline it. | Rafael Espindola | 2014-06-11 | 3 | -79/+10 |
| * | Remove unused has_magic. | Rafael Espindola | 2014-06-11 | 1 | -18/+0 |
| * | [FastISel][X86] Add support for the frameaddress intrinsic. | Juergen Ributzka | 2014-06-11 | 1 | -0/+52 |
| * | [AArch64] Basic Sched Model for Cortex-A57. | Chad Rosier | 2014-06-11 | 3 | -1/+818 |
| * | R600: Set correct InstrItinClass for instructions using *Helper classes | Tom Stellard | 2014-06-11 | 1 | -3/+3 |
| * | R600: BCNT_INT is a vector only instruction | Tom Stellard | 2014-06-11 | 1 | -1/+1 |
| * | ARM: honor hex immediate formatting for ldr/str i12 offsets. | Jim Grosbach | 2014-06-11 | 1 | -2/+2 |
| * | R600/SI: Fix bitcast between v2i32 and f64 | Matt Arsenault | 2014-06-11 | 1 | -0/+2 |
| * | Use std::error_code instead of llvm::error_code. | Rafael Espindola | 2014-06-11 | 15 | -328/+147 |
| * | Fix assert comments in Instruction.cpp. | Chad Rosier | 2014-06-11 | 1 | -6/+6 |
| * | R600/SI: Update place using old subtarget predicate | Matt Arsenault | 2014-06-11 | 1 | -2/+2 |
| * | R600/SI: Add common 64-bit LDS atomics | Matt Arsenault | 2014-06-11 | 3 | -17/+43 |
| * | R600/SI: Add instruction definitions for 64-bit LDS atomics | Matt Arsenault | 2014-06-11 | 1 | -0/+47 |
| * | R600/SI: Add 32-bit LDS atomic cmpxchg | Matt Arsenault | 2014-06-11 | 2 | -0/+24 |
| * | R600/SI: Use LDS atomic inc / dec | Matt Arsenault | 2014-06-11 | 1 | -0/+16 |
| * | R600/SI: Add other LDS atomic operations | Matt Arsenault | 2014-06-11 | 1 | -3/+12 |
| * | R600/SI: Add instruction definitions for more LDS ops | Matt Arsenault | 2014-06-11 | 2 | -0/+104 |
| * | R600/SI: Fix backwards names for local atomic instructions. | Matt Arsenault | 2014-06-11 | 1 | -4/+4 |
| * | R600/SI: Refactor local atomics. | Matt Arsenault | 2014-06-11 | 2 | -11/+30 |
| * | R600/SI: Use v_cvt_f32_ubyte* instructions | Matt Arsenault | 2014-06-11 | 7 | -5/+170 |
| * | R600/SI: Fix selection failure on scalar_to_vector | Matt Arsenault | 2014-06-11 | 2 | -6/+23 |
| * | X86: add stringy name for X86ISD::LCMPXCHG16_DAG | Tim Northover | 2014-06-11 | 1 | -0/+1 |
| * | Revert r210613 to conform to coding standards. | Eric Christopher | 2014-06-11 | 1 | -1/+1 |
| * | [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register ... | Matheus Almeida | 2014-06-11 | 5 | -1/+121 |
| * | Add AVX512 masked leadz instrinsic support. | Cameron McInally | 2014-06-11 | 1 | -0/+22 |
| * | [X86] Refactor the logic to select horizontal adds/subs to a helper function. | Andrea Di Biagio | 2014-06-11 | 1 | -90/+118 |
