summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit message (Expand)AuthorAgeFilesLines
* [CostModel][X86] Add missing scalar i64->f32 uitofp costsSimon Pilgrim2020-01-061-0/+4
* [X86] Custom widen 128/256-bit vXi32 fp_to_uint on avx512f targets without av...Craig Topper2019-12-261-0/+1
* [NFC][TTI] Add Alignment for isLegalMasked[Gather/Scatter]Anna Welker2019-12-181-5/+7
* Rename TTI::getIntImmCost for instructions and intrinsicsReid Kleckner2019-12-111-3/+3
* [ARM] Teach the Arm cost model that a Shift can be folded into other instruct...David Green2019-12-091-6/+7
* [x86] add cost model special-case for insert/extract from element 0Sanjay Patel2019-12-061-3/+9
* [X86] Remove ProcIntelGLM/ProcIntelGLP/ProcIntelTRM and replace them with a s...Craig Topper2019-12-051-2/+2
* [x86] make SLM extract vector element more expensive than defaultSanjay Patel2019-11-271-0/+14
* [X86] Remove setOperationAction for FP_TO_SINT v8i16.Craig Topper2019-11-121-0/+3
* [X86TargetTransformInfo] Fixed warning: Expression 'ISD == ISD::UREM' is alwa...Dávid Bolvanský2019-11-061-1/+1
* [CostModel][X86] Improve add vXi64 + fadd vXf64 reduction tests for SLMSimon Pilgrim2019-11-061-0/+26
* [X86] Lower the cost of avx512 horizontal bool and/or reductions to 2*log2(bi...Craig Topper2019-11-041-0/+21
* [X86] Reland: Enable YMM memcmp with AVX1David Zarzycki2019-11-011-3/+2
* Revert rG0e252ae19ff8d99a59d64442c38eeafa5825d441 : [X86] Enable YMM memcmp w...Simon Pilgrim2019-10-311-2/+3
* [X86] Enable YMM memcmp with AVX1David Zarzycki2019-10-311-3/+2
* [X86] Only look up boolean reduction cost tables if the reduction is not pair...Craig Topper2019-10-261-1/+1
* [Alignment][NFC] getMemoryOpCost uses MaybeAlignGuillaume Chatelet2019-10-251-10/+11
* [CostModel][X86] Add CTLZ scalar costsSimon Pilgrim2019-10-141-1/+22
* [CostModel][X86] Add CTPOP scalar costs (PR43656)Simon Pilgrim2019-10-141-0/+23
* [NFC][TTI] Add Alignment for isLegalMasked[Load/Store]Sam Parker2019-10-141-5/+6
* [CostModel][X86] Improve sum reduction costs.Simon Pilgrim2019-10-121-22/+23
* recommit: [LoopVectorize][PowerPC] Estimate int and float register pressure s...Zi Xuan Wu2019-10-121-1/+2
* Revert "[LoopVectorize][PowerPC] Estimate int and float register pressure sep...Jinsong Ji2019-10-081-2/+1
* [LoopVectorize][PowerPC] Estimate int and float register pressure separately ...Zi Xuan Wu2019-10-081-1/+2
* [X86] Enable inline memcmp() to use AVX512David Zarzycki2019-10-041-2/+1
* [X86] Remove -x86-experimental-vector-widening-legalization command line flagCraig Topper2019-09-291-71/+15
* [Alignment][NFC] Remove unneeded llvm:: scoping on Align typesGuillaume Chatelet2019-09-271-2/+2
* [CostModel][X86] Fix SLM <2 x i64> icmp costsSimon Pilgrim2019-09-261-0/+9
* [Cost][X86] Add more missing vector truncation costsSimon Pilgrim2019-09-221-0/+6
* [Cost][X86] Add v2i64 truncation costsSimon Pilgrim2019-09-221-0/+4
* [LLVM][Alignment] Convert isLegalNTStore/isLegalNTLoad to llvm::AlignGuillaume Chatelet2019-09-051-2/+2
* [X86] Simplify the setOperationAction handling for fp_to_uint by improving th...Craig Topper2019-09-031-0/+4
* [X86] Lower the cost of v2i32->v2f64 sint_to_fp under vector widening legaliz...Craig Topper2019-08-221-0/+18
* [X86] Add back the -x86-experimental-vector-widening-legalization comand line...Craig Topper2019-08-201-13/+52
* [X86] Improve cost model for subvector extraction of less than 128-bit vectorsCraig Topper2019-08-151-0/+33
* [X86][CostModel] Adjust the costs of ZERO_EXTEND/SIGN_EXTEND with less than 1...Craig Topper2019-08-141-10/+12
* Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization...Craig Topper2019-08-071-9/+45
* Revert "[X86] Enable -x86-experimental-vector-widening-legalization by default."Mitch Phillips2019-08-061-45/+9
* [X86] Enable -x86-experimental-vector-widening-legalization by default.Craig Topper2019-08-051-9/+45
* [ExpandMemCmp] Honor prefer-vector-width.Clement Courbet2019-06-261-2/+3
* [ExpandMemCmp] Move all options to TargetTransformInfo.Clement Courbet2019-06-251-25/+16
* [LV] Suppress vectorization in some nontemporal casesWarren Ristow2019-06-171-0/+35
* [CostModel][X86] Improve masked load/store AVX1/AVX2 costsSimon Pilgrim2019-06-021-2/+2
* [TTI][X86] Cleanup getMaskedMemoryOpCost. NFCI.Simon Pilgrim2019-06-021-8/+11
* [CostModel][X86] Add min/max reduction costs for all SSE targetsSimon Pilgrim2019-05-111-6/+90
* [TTI][X86] Make getAddressComputationCost cost value const. NFCI.Simon Pilgrim2019-05-051-1/+1
* [CostModel][X86] Add bool anyof/allof reduction costsSimon Pilgrim2019-04-171-0/+42
* [CostModel][X86] Masked load legalization requires an binary-shuffle not a se...Simon Pilgrim2019-04-071-2/+2
* [X86MacroFusion] Handle branch fusion (AMD CPUs).Clement Courbet2019-03-281-1/+1
* [ScalarizeMaskedMemIntrin] Add support for scalarizing expandload and compres...Craig Topper2019-03-211-0/+28
OpenPOWER on IntegriCloud