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* [X86] Add an Unoptimized Load Value Injection (LVI) Load Hardening PassScott Constable2020-06-243-1/+82
* [X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)Scott Constable2020-06-241-3/+306
* [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) G...Scott Constable2020-06-247-0/+984
* [X86] Fix to X86LoadValueInjectionRetHardeningPass for possible segfaultScott Constable2020-06-241-0/+3
* Revert "[X86] Add a Pass that builds a Condensed CFG for Load Value Injection...Craig Topper2020-06-247-1035/+0
* Revert "[X86] Add Support for Load Hardening to Mitigate Load Value Injection...Craig Topper2020-06-241-277/+5
* [X86] Add Support for Load Hardening to Mitigate Load Value Injection (LVI)Scott Constable2020-06-241-5/+277
* [X86] Add a Pass that builds a Condensed CFG for Load Value Injection (LVI) G...Scott Constable2020-06-247-0/+1035
* [X86] Add RET-hardening Support to mitigate Load Value Injection (LVI)Scott Constable2020-06-244-0/+145
* [X86] Add Indirect Thunk Support to X86 to mitigate Load Value Injection (LVI)Scott Constable2020-06-244-8/+68
* [X86] Refactor X86IndirectThunks.cpp to Accommodate Mitigations other than Re...Scott Constable2020-06-241-125/+157
* [X86][NFC] Generalize the naming of "Retpoline Thunks" and related code to "I...Scott Constable2020-06-2414-113/+135
* [X86] make sure POP has implicit def/use of stack pointer when materializing ...Yuanfang Chen2020-06-171-0/+2
* [X86] Fold undef elts to 0 in getTargetVShiftByConstNode.Craig Topper2020-06-161-3/+6
* [X86] Teach combineVectorShiftImm to constant fold undef elements to 0 not un...Craig Topper2020-06-161-2/+10
* [X86] Add x, t and g modifiers for inline asmCraig Topper2020-06-111-1/+45
* Enable IBT(Indirect Branch Tracking) in JIT with CET(Control-flow Enforcement...Xiang1 Zhang2020-05-183-8/+23
* CET for Exception HandlePengfei Wang2020-05-181-3/+10
* [X86][SSE] combineX86ShufflesConstants - early out for zeroable vectors (PR45...Simon Pilgrim2020-04-161-1/+7
* [X86CmovConversion] Make heuristic for optimized cmov depth more conservative...Nikita Popov2020-02-191-6/+7
* [X86] Use MVT::i8 instead of MVT::i64 for shift amount in BuildSDIVPow2Craig Topper2020-02-101-1/+1
* [X86] -fpatchable-function-entry=N,0: place patch label after ENDBR{32,64}Fangrui Song2020-02-051-0/+19
* [X86] Make `llc --help` output readable againRoman Lebedev2020-01-271-7/+7
* [X86] Don't call LowerUINT_TO_FP_i32 for i32->f80 on 32-bit targets with sse2.Craig Topper2020-01-151-1/+1
* CMake: Make most target symbols hidden by defaultTom Stellard2020-01-146-6/+6
* [BranchAlign] Add master --x86-branches-within-32B-boundaries flagPhilip Reames2020-01-141-2/+23
* [Win64] Handle FP arguments more gracefully under -mno-sseReid Kleckner2020-01-142-22/+31
* [X86] Drop an unneeded FIXME. NFCCraig Topper2020-01-141-1/+0
* [X86] Swap the 0 and the fudge factor in the constant pool for the 32-bit mod...Craig Topper2020-01-141-4/+4
* [X86] Directly emit a BROADCAST_LOAD from constant pool in lowerUINT_TO_FP_vX...Craig Topper2020-01-141-2/+12
* [X86] Copy the nofpexcept flag when folding a load into an instruction using ...Craig Topper2020-01-131-0/+4
* [X86][Disassembler] Fix a bug when disassembling an empty stringFangrui Song2020-01-131-1/+3
* [X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI.Simon Pilgrim2020-01-131-2/+2
* [X86] Use SDNPOptInGlue instead of SDNPInGlue on a couple SDNodes.Craig Topper2020-01-121-2/+2
* [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64 shuffles.Simon Pilgrim2020-01-121-0/+12
* [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded elements...Simon Pilgrim2020-01-121-2/+1
* [X86][Disassembler] Merge X86DisassemblerDecoder.cpp into X86Disassembler.cpp...Fangrui Song2020-01-124-1868/+1569
* [X86][Disassembler] SimplifyFangrui Song2020-01-123-45/+7
* [X86] Don't call LowerSETCC from LowerSELECT for STRICT_FSETCC/STRICT_FSETCCS...Craig Topper2020-01-111-3/+1
* [TargetLowering][X86] Connect the chain from STRICT_FSETCC in TargetLowering:...Craig Topper2020-01-111-2/+4
* [X86][Disassembler] Optimize argument passing and immediate readingFangrui Song2020-01-113-74/+41
* [Disassembler] Delete the VStream parameter of MCDisassembler::getInstruction()Fangrui Song2020-01-111-2/+1
* [X86][Disassembler] Replace custom logger with LLVM_DEBUGFangrui Song2020-01-113-56/+14
* [X86][Disassembler] Simplify and optimize reader functionsFangrui Song2020-01-113-180/+101
* [X86] Turn FP_ROUND/STRICT_FP_ROUND into X86ISD::VFPROUND/STRICT_VFPROUND dur...Craig Topper2020-01-113-67/+4
* [X86] Adjust nop emission by compiler to consider target decode limitationsPhilip Reames2020-01-111-0/+17
* [X86AsmBackend] Move static function before sole use [NFC]Philip Reames2020-01-111-34/+34
* [X86AsmBackend] Be consistent about placing definitions out of line [NFC]Philip Reames2020-01-111-49/+57
* [X86] Fix outdated commentSimon Pilgrim2020-01-111-2/+1
* [X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP loweringSimon Pilgrim2020-01-111-0/+40
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