| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [X86][Btver2] Fix latency and throughput of CMPXCHG instructions. | Andrea Di Biagio | 2019-08-20 | 1 | -0/+57 |
| * | [X86] Merge the different SETcc instructions for each condition code into sin... | Craig Topper | 2019-04-05 | 1 | -0/+12 |
| * | [X86] Merge the different CMOV instructions for each condition code into sing... | Craig Topper | 2019-04-05 | 1 | -0/+12 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [X86][BtVer2] Teach how to identify zero-idiom VPERM2F128rr instructions. | Andrea Di Biagio | 2018-10-01 | 1 | -0/+7 |
| * | [Tablegen][MCInstPredicate] Removed redundant template argument from class TI... | Andrea Di Biagio | 2018-08-14 | 1 | -1/+1 |
| * | [MC][PredicateExpander] Extend the grammar to support simple switch and retur... | Andrea Di Biagio | 2018-08-09 | 1 | -5/+12 |
| * | [X86][BtVer2] correctly model the latency/throughput of LEA instructions. | Andrea Di Biagio | 2018-07-19 | 1 | -0/+49 |
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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