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path: root/llvm/lib/Target/X86/X86RegisterInfo.cpp
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* Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.Evan Cheng2006-01-091-2/+0
* * Fast call support.Evan Cheng2006-01-061-1/+2
* Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.Evan Cheng2005-12-241-6/+6
* * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.Evan Cheng2005-12-231-0/+1
* Rewrite FP stackifier support in the X86InstrInfo.td file, splitting patternsChris Lattner2005-12-211-4/+3
* Properly split f32 and f64 into separate register classes for scalar sse fpNate Begeman2005-10-141-5/+11
* simplify this code using the new regclass info passed inChris Lattner2005-09-301-29/+45
* Pass extra regclasses into spilling codeChris Lattner2005-09-301-2/+4
* Implement the isLoadFromStackSlot interfaceChris Lattner2005-09-191-0/+25
* The simple isel being gone makes this dead!Chris Lattner2005-08-191-19/+0
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-4/+4
* First round of support for doing scalar FP using the SSE2 ISA extension andNate Begeman2005-07-061-6/+16
* Teach reginfo how to deal with ADJSTACKPTRri, allowing us to generate:Chris Lattner2005-05-151-0/+3
* When emitting the function epilog, check to see if there already a stackChris Lattner2005-05-141-8/+23
* Add some new instructionsChris Lattner2005-05-141-2/+10
* switch to having the callee pop stack operands for fastcc. This is currently...Chris Lattner2005-05-131-5/+19
* allow RETIChris Lattner2005-05-131-1/+1
* add signed versions of the extra precision multipliesChris Lattner2005-04-061-0/+3
* Add rotate instructions.Chris Lattner2005-01-191-0/+12
* Improve coverage of the X86 instruction set by adding 16-bit shift doubles.Chris Lattner2005-01-191-0/+4
* Add conditional moves for the parity flag.Chris Lattner2005-01-101-0/+4
* Add support for SETNPr to lower to memory form.Chris Lattner2005-01-021-0/+1
* Spill/restore X86 floating point stack registers with 64-bits of precisionChris Lattner2004-12-021-4/+5
* Add some new instructions. Fix the asm string for sbb32rrChris Lattner2004-10-061-0/+2
* Changes For Bug 352Reid Spencer2004-09-011-2/+2
* Reduce uses of getRegClassChris Lattner2004-08-211-14/+11
* Code insertion methods now return void instead of an int.Chris Lattner2004-08-151-13/+10
* These methods no longer take a TargetRegisterClass* operand.Chris Lattner2004-08-151-4/+4
* Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. ...Nate Begeman2004-08-141-2/+2
* Reserve the correct amt of space.Chris Lattner2004-07-171-2/+2
* Delete the allocate*TargetMachine function, which is now dead .Chris Lattner2004-07-111-1/+1
* Add #include <iostream> since Value.h does not #include it any more.Reid Spencer2004-07-041-0/+2
* Spell out `NoFramePointerElim' for readability.Misha Brukman2004-06-211-1/+1
* Use the common `NoFPElim' setting instead of our own.Misha Brukman2004-06-211-4/+2
* Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()Chris Lattner2004-06-171-1/+1
* Add support for the setp instructionsChris Lattner2004-06-111-0/+1
* Convert to the new TargetMachine interface.Chris Lattner2004-06-021-2/+2
* Add more ADC and SBB variantsAlkis Evlogimenos2004-04-021-0/+2
* Implement spill code folding for all of the conditional move instructionsChris Lattner2004-03-301-0/+21
* Another API change to MRegisterInfo::foldMemoryOperand. Instead of aAlkis Evlogimenos2004-03-141-4/+3
* Change MRegisterInfo::foldMemoryOperand to return the foldedAlkis Evlogimenos2004-03-141-169/+163
* Add memory operand version of conditional move.Alkis Evlogimenos2004-03-071-0/+3
* A big X86 instruction rename. The instructions are renamed to makeAlkis Evlogimenos2004-02-291-148/+148
* SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename themAlkis Evlogimenos2004-02-281-2/+2
* Floating point loads/stores act on memory operands. Rename them toAlkis Evlogimenos2004-02-281-2/+2
* Uncomment instructions that take both an immediate and a memoryAlkis Evlogimenos2004-02-281-11/+11
* Do not generate instructions with mismatched memory/immediate sizedAlkis Evlogimenos2004-02-281-11/+11
* Add memory operand folding support for the SETcc family ofAlkis Evlogimenos2004-02-271-0/+12
* Add memory operand folding support for SHLD and SHRD instructions.Alkis Evlogimenos2004-02-271-0/+11
* Add memory operand folding support for SHL, SHR and SAR, SHLD instructions.Alkis Evlogimenos2004-02-271-0/+18
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