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authorChris Lattner <sabre@nondot.org>2004-08-15 22:15:11 +0000
committerChris Lattner <sabre@nondot.org>2004-08-15 22:15:11 +0000
commita0b38d3cb18fad908b3f50b4c5470908a8bc68c1 (patch)
tree1f3a0f38429aa995d3936b9625957a09b3a84bd5 /llvm/lib/Target/X86/X86RegisterInfo.cpp
parent61998994832bc95914adb41a68125d9382d97ae2 (diff)
downloadbcm5719-llvm-a0b38d3cb18fad908b3f50b4c5470908a8bc68c1.tar.gz
bcm5719-llvm-a0b38d3cb18fad908b3f50b4c5470908a8bc68c1.zip
Code insertion methods now return void instead of an int.
llvm-svn: 15780
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp23
1 files changed, 10 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 6890cbe97b9..730988c9b09 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -54,37 +54,34 @@ static unsigned getIdx(const TargetRegisterClass *RC) {
}
}
-int X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned SrcReg, int FrameIdx) const {
+void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned SrcReg, int FrameIdx) const {
static const unsigned Opcode[] =
{ X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FSTP80m };
const TargetRegisterClass *RC = getRegClass(SrcReg);
MachineInstr *I = addFrameReference(BuildMI(Opcode[getIdx(RC)], 5),
FrameIdx).addReg(SrcReg);
MBB.insert(MI, I);
- return 1;
}
-int X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned DestReg, int FrameIdx) const{
+void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, int FrameIdx)const{
static const unsigned Opcode[] =
{ X86::MOV8rm, X86::MOV16rm, X86::MOV32rm, X86::FLD80m };
const TargetRegisterClass *RC = getRegClass(DestReg);
unsigned OC = Opcode[getIdx(RC)];
MBB.insert(MI, addFrameReference(BuildMI(OC, 4, DestReg), FrameIdx));
- return 1;
}
-int X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *RC) const {
+void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const {
static const unsigned Opcode[] =
{ X86::MOV8rr, X86::MOV16rr, X86::MOV32rr, X86::FpMOV };
MBB.insert(MI, BuildMI(Opcode[getIdx(RC)],1,DestReg).addReg(SrcReg));
- return 1;
}
static MachineInstr *MakeMInst(unsigned Opcode, unsigned FrameIndex,
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