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authorChris Lattner <sabre@nondot.org>2005-09-19 05:23:44 +0000
committerChris Lattner <sabre@nondot.org>2005-09-19 05:23:44 +0000
commitde3c87a2ab88e5cedac5a27901158cd6172d6c09 (patch)
tree417c4ffb6317c49d326e45e7bbeb174fa03faa70 /llvm/lib/Target/X86/X86RegisterInfo.cpp
parentb4b2530a1a89a80b0e6334c3a9f98ac1d6fbe8dc (diff)
downloadbcm5719-llvm-de3c87a2ab88e5cedac5a27901158cd6172d6c09.tar.gz
bcm5719-llvm-de3c87a2ab88e5cedac5a27901158cd6172d6c09.zip
Implement the isLoadFromStackSlot interface
llvm-svn: 23387
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp25
1 files changed, 25 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 732b8cf2487..7b8d188b2c3 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -92,6 +92,31 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
BuildMI(MBB, MI, Opc, 1, DestReg).addReg(SrcReg);
}
+unsigned X86RegisterInfo::isLoadFromStackSlot(MachineInstr *MI,
+ int &FrameIndex) const {
+ switch (MI->getOpcode()) {
+ default: break;
+ case X86::MOV8rm:
+ case X86::MOV16rm:
+ case X86::MOV32rm:
+ case X86::FLD64m:
+ case X86::FLD80m:
+ case X86::MOVAPDrm:
+ case X86::MOVSDrm:
+ if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
+ MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() &&
+ MI->getOperand(2).getImmedValue() == 1 &&
+ MI->getOperand(3).getReg() == 0 &&
+ MI->getOperand(4).getImmedValue() == 0) {
+ FrameIndex = MI->getOperand(1).getFrameIndex();
+ return MI->getOperand(0).getReg();
+ }
+ break;
+ }
+ return 0;
+}
+
+
static MachineInstr *MakeMInst(unsigned Opcode, unsigned FrameIndex,
MachineInstr *MI) {
return addFrameReference(BuildMI(Opcode, 4), FrameIndex);
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