| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | Remove use of OpSize for populating VEX_PP field. A prefix encoding is now us... | Craig Topper | 2014-01-16 | 1 | -10/+4 |
| * | Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ... | Craig Topper | 2014-01-14 | 1 | -0/+19 |
| * | AVX-512: Embedded Rounding Control - encoding and printing | Elena Demikhovsky | 2014-01-13 | 1 | -9/+15 |
| * | [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand | David Woodhouse | 2014-01-08 | 1 | -4/+9 |
| * | [x86] Use 16-bit addressing where possible in 16-bit mode | David Woodhouse | 2014-01-08 | 1 | -14/+18 |
| * | [x86] Fix JCXZ,JECXZ_32 for 16-bit mode | David Woodhouse | 2014-01-08 | 1 | -1/+5 |
| * | Remove SegOvrBits from X86 TSFlags since they weren't being used. | Craig Topper | 2014-01-06 | 1 | -23/+13 |
| * | Remove argument to fix build bot failure. | Craig Topper | 2014-01-06 | 1 | -1/+1 |
| * | Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode | Craig Topper | 2014-01-06 | 1 | -2/+1 |
| * | [x86] Add basic support for .code16 | Craig Topper | 2014-01-06 | 1 | -2/+10 |
| * | Fix ModR/M byte output for 16-bit addressing modes (PR18220) | Craig Topper | 2014-01-05 | 1 | -0/+60 |
| * | AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp | Elena Demikhovsky | 2014-01-01 | 1 | -8/+29 |
| * | Remove MRMInitReg form now that it's last use is gone. | Craig Topper | 2013-12-31 | 1 | -4/+0 |
| * | Merge case statements to remove redundant code. | Craig Topper | 2013-12-30 | 1 | -18/+12 |
| * | Change type of XOP flag in code emitters to a bool. Remove a some unneeded ca... | Craig Topper | 2013-09-29 | 1 | -7/+4 |
| * | Add comments for XOPA map introduced with TBM instructions.a | Craig Topper | 2013-09-29 | 1 | -1/+2 |
| * | Adding intrinsics to the llvm backend for TBM instruction set. | Yunzhong Gao | 2013-09-27 | 1 | -0/+3 |
| * | AVX-512: Added masked SHIFT commands, more encoding tests | Elena Demikhovsky | 2013-08-22 | 1 | -5/+6 |
| * | Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MC... | Craig Topper | 2013-08-21 | 1 | -1/+1 |
| * | EVEX and compressed displacement encoding for AVX512 | Elena Demikhovsky | 2013-08-01 | 1 | -47/+268 |
| * | Use pointers to the MCAsmInfo and MCRegInfo. | Bill Wendling | 2013-06-18 | 1 | -1/+1 |
| * | Fix section relocation for SECTIONREL32 with immediate offset. | Rafael Espindola | 2013-04-25 | 1 | -2/+15 |
| * | Add CLAC/STAC instruction encoding/decoding support | Michael Liao | 2013-04-11 | 1 | -6/+9 |
| * | In the X86 back end, getMemoryOperandNo() returns the offset | Preston Gurd | 2013-04-10 | 1 | -11/+1 |
| * | x86 -- add the XTEST instruction | Dave Zarzycki | 2013-03-25 | 1 | -10/+8 |
| * | Add X86 code emitter support AVX encoded MRMDestReg instructions. | Craig Topper | 2013-03-16 | 1 | -4/+15 |
| * | Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ... | Craig Topper | 2013-03-14 | 1 | -0/+8 |
| * | Add support of RTM from TSX extension | Michael Liao | 2012-11-08 | 1 | -7/+8 |
| * | Add register encoding support in X86 backend | Michael Liao | 2012-10-04 | 1 | -4/+5 |
| * | Remove code for setting the VEX L-bit as a function of operand size from the ... | Craig Topper | 2012-09-19 | 1 | -9/+0 |
| * | Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments. | Craig Topper | 2012-09-15 | 1 | -2/+2 |
| * | Update GATHER instructions to support 2 read-write operands. Patch from mysel... | Craig Topper | 2012-07-12 | 1 | -5/+14 |
| * | X86: add GATHER intrinsics (AVX2) in LLVM | Manman Ren | 2012-06-26 | 1 | -1/+6 |
| * | Added FMA3 Intel instructions. | Elena Demikhovsky | 2012-05-31 | 1 | -2/+6 |
| * | Add intrinsics, code gen, assembler and disassembler support for the SSE4a ex... | Benjamin Kramer | 2012-05-29 | 1 | -2/+3 |
| * | Tidy up some spacing and inconsistent use of pre/post increment. No functiona... | Craig Topper | 2012-05-19 | 1 | -15/+15 |
| * | Allow MCCodeEmitter access to the target MCRegisterInfo. | Jim Grosbach | 2012-05-15 | 1 | -0/+1 |
| * | Put Is64BitMemOperand into !defined(NDEBUG) for now. | Joerg Sonnenberger | 2012-03-21 | 1 | -0/+2 |
| * | Fix generation of the address size override prefix. Add assertions for | Joerg Sonnenberger | 2012-03-21 | 1 | -5/+51 |
| * | Add vmfunc instruction to X86 assembler and disassembler. | Craig Topper | 2012-02-19 | 1 | -6/+8 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 | 1 | -1/+1 |
| * | Add X86 assembler and disassembler support for AMD SVM instructions. Original... | Craig Topper | 2012-02-18 | 1 | -46/+36 |
| * | Add support for implicit TLS model used with MS VC runtime. | Anton Korobeynikov | 2012-02-11 | 1 | -0/+6 |
| * | Convert assert(0) to llvm_unreachable in X86 Target directory. | Craig Topper | 2012-02-05 | 1 | -9/+9 |
| * | Keep source location information for X86 MCFixup's. | Jim Grosbach | 2012-01-27 | 1 | -18/+20 |
| * | Separate the concept of having memory access in operand 4 from the concept of... | Craig Topper | 2011-12-30 | 1 | -15/+8 |
| * | XOP encoding bits and logic. | Jan Sjödin | 2011-12-12 | 1 | -4/+28 |
| * | Handle expressions of the form _GLOBAL_OFFSET_TABLE_-symbol the same way gas | Rafael Espindola | 2011-12-10 | 1 | -12/+28 |
| * | Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this a... | Jan Sjödin | 2011-12-08 | 1 | -11/+8 |
| * | This patch contains support for encoding FMA4 instructions and | Bruno Cardoso Lopes | 2011-11-25 | 1 | -5/+29 |
