summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
diff options
context:
space:
mode:
authorDavid Woodhouse <dwmw2@infradead.org>2014-01-08 12:58:12 +0000
committerDavid Woodhouse <dwmw2@infradead.org>2014-01-08 12:58:12 +0000
commit84ed54f91e0dfec0355bdc723fa06fff9a57d089 (patch)
tree8ad11acc67da711ffc55c8b654578f27d3dc3fdb /llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
parent79dd505ce17b8e05f1759b6c17ac79204a2be4cf (diff)
downloadbcm5719-llvm-84ed54f91e0dfec0355bdc723fa06fff9a57d089.tar.gz
bcm5719-llvm-84ed54f91e0dfec0355bdc723fa06fff9a57d089.zip
[x86] Fix JCXZ,JECXZ_32 for 16-bit mode
JCXZ should have the 0x67 prefix only if we're in 32-bit mode, so make that appropriately conditional. And JECXZ needs the prefix instead. llvm-svn: 198757
Diffstat (limited to 'llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index e44574c31e2..d3879e6c4cf 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1161,7 +1161,11 @@ void X86MCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
// Emit the address size opcode prefix as needed.
bool need_address_override;
- if (TSFlags & X86II::AdSize) {
+ // The AdSize prefix is only for 32-bit and 64-bit modes; in 16-bit mode we
+ // need the address override only for JECXZ instead. Since it's only one
+ // instruction, we special-case it rather than introducing an AdSize16 bit.
+ if ((!is16BitMode() && TSFlags & X86II::AdSize) ||
+ (is16BitMode() && MI.getOpcode() == X86::JECXZ_32)) {
need_address_override = true;
} else if (MemOperand == -1) {
need_address_override = false;
OpenPOWER on IntegriCloud