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* Implement new method by method assembly output & memory releasingChris Lattner2002-02-031-1/+13
| | | | llvm-svn: 1656
* Changes to build successfully with GCC 3.02Chris Lattner2002-01-201-19/+21
| | | | llvm-svn: 1503
* removed SizeOfStackOperand constant from the SparcRegInfo class - no longer usedRuchira Sasanka2002-01-071-2/+1
| | | | | | by code. llvm-svn: 1497
* Added more commentsRuchira Sasanka2002-01-071-42/+102
| | | | llvm-svn: 1496
* Added comments and correct logic for finding register sizes.Ruchira Sasanka2002-01-071-10/+19
| | | | llvm-svn: 1494
* Add function returning which operand holds immediate constantVikram S. Adve2001-11-141-0/+16
| | | | | | for a given opcode. llvm-svn: 1307
* When allocating space on stack for writing a register,Vikram S. Adve2001-11-121-0/+2
| | | | | | | use the size of the register, not the size of the Value type, to get the right alignment. llvm-svn: 1284
* Added phi elimination codeRuchira Sasanka2001-11-121-1/+10
| | | | llvm-svn: 1265
* Down-growing offsets from FP should start at 0, not -1.Vikram S. Adve2001-11-111-1/+1
| | | | llvm-svn: 1255
* Corrected reodering code for instructions inserted before callsRuchira Sasanka2001-11-101-1/+28
| | | | llvm-svn: 1252
* Added code for correct reordering of call argumentsRuchira Sasanka2001-11-091-0/+4
| | | | llvm-svn: 1234
* Bug fix: Need to include the stack offset "bias" in assembly code itself.Vikram S. Adve2001-11-091-8/+39
| | | | | | | Added class UltraSparcCacheInfo. Added function to convert float to int by copying via memory. llvm-svn: 1224
* Use MachineFrameInfo as base class of UltraSparcFrameInfo, and madeVikram S. Adve2001-11-081-24/+102
| | | | | | a major overhaul of this class and how stack frames are managed. llvm-svn: 1191
* Killing warningsChris Lattner2001-11-071-0/+1
| | | | llvm-svn: 1175
* Squelch warnings about not returning a valueChris Lattner2001-11-071-3/+4
| | | | llvm-svn: 1173
* Fixed instruction information for RDCCR and WRCCR.Vikram S. Adve2001-11-041-7/+16
| | | | | | | | Fixed selection to create a TmpInstruction for each integer CC register (since it is an implicit side-effect, unlike FP CC registers which are explicit operands). llvm-svn: 1120
* Added code to support correct saving of %ccr across callsRuchira Sasanka2001-11-031-3/+5
| | | | llvm-svn: 1111
* Arranged stack frame - needs furhter organizationRuchira Sasanka2001-11-031-0/+3
| | | | | | Moved InsertCallerSaveInstr to the SparcRegInfo.cpp llvm-svn: 1106
* Added support for spillingRuchira Sasanka2001-10-281-4/+27
| | | | llvm-svn: 992
* Reordered a couple of registers to simplify some new checks.Vikram S. Adve2001-10-221-7/+41
| | | | | | | Added code to map between caller's and callee's register windows. Added frame layout class. llvm-svn: 937
* Added support for both call/jmpl instructionsRuchira Sasanka2001-10-211-1/+7
| | | | llvm-svn: 930
* Added virtual function to generate an instruction sequence toVikram S. Adve2001-10-181-4/+13
| | | | | | load a constant into a register. llvm-svn: 862
* Added support for caller savingRuchira Sasanka2001-10-161-8/+32
| | | | llvm-svn: 847
* Output to cerr rather than cout so that debug info doesn't mess up assembly ↵Chris Lattner2001-10-151-4/+1
| | | | | | generation llvm-svn: 840
* updated suggesting/coloring of call & return args & implicit operandsRuchira Sasanka2001-10-151-7/+14
| | | | llvm-svn: 830
* Be const correctChris Lattner2001-10-151-1/+1
| | | | llvm-svn: 826
* Fix broken #endifChris Lattner2001-10-131-1/+1
| | | | llvm-svn: 768
* added suggesting color supportRuchira Sasanka2001-09-301-16/+120
| | | | llvm-svn: 673
* Seperate instruction definitions into new SparcInstr.def fileChris Lattner2001-09-191-767/+6
| | | | | | | Move contents of SparcMachineInstrDesc[] out of SparcInternals.h into Sparc.cpp llvm-svn: 644
* Add emitAssemblyMethod to TargetMachineChris Lattner2001-09-191-9/+11
| | | | llvm-svn: 635
* -- ruchiraRuchira Sasanka2001-09-181-21/+37
| | | | llvm-svn: 632
* Remove extraneous #includesChris Lattner2001-09-181-3/+0
| | | | llvm-svn: 627
* Make class TargetMachine the common interface to all target-dependentVikram S. Adve2001-09-181-21/+29
| | | | | | | | information, including instr, sched, and reg information. This allows us to allocate them all in one place and use them much more uniformly. llvm-svn: 618
* modified printing of debug messagesRuchira Sasanka2001-09-151-13/+3
| | | | llvm-svn: 593
* added register allocation codeRuchira Sasanka2001-09-151-18/+68
| | | | llvm-svn: 585
* Chris seems fond of #include <vector>. Fix these. Also convert use list inChris Lattner2001-09-141-15/+2
| | | | | | | | Value to a vector instead of a list. Move SchedGraph.h & SchedPriorities.h into lib/CodeGen/InstrScheduling llvm-svn: 572
* Make a new llvm/Target #include directory.Chris Lattner2001-09-141-1/+1
| | | | | | | | Move files from lib/CodeGen/TargetMachine to lib/Target Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h} Prepare to split TargetMachine.h into several smaller files llvm-svn: 566
* Checkin changes to:Chris Lattner2001-09-141-1/+30
| | | | | | | | | 1. Clean up the TargetMachine structure. No more wierd pointers that have to be cast around and taken care of by the target. 2. Instruction Scheduling now takes the schedinfo as an argument. The same should be done with the instinfo, it just isn't now. llvm-svn: 565
* Move files to new sparc directoryChris Lattner2001-09-141-0/+1667
llvm-svn: 563
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