summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Sparc/SparcInternals.h
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2001-10-15 18:15:27 +0000
committerChris Lattner <sabre@nondot.org>2001-10-15 18:15:27 +0000
commitf3f1e452eab177f358bbcd433cb2000db1478e1b (patch)
treea4c535cc0aef2d5627e38289beed9882a7042f55 /llvm/lib/Target/Sparc/SparcInternals.h
parent66fc9e73edf4a112d00637972990353d58ed04d3 (diff)
downloadbcm5719-llvm-f3f1e452eab177f358bbcd433cb2000db1478e1b.tar.gz
bcm5719-llvm-f3f1e452eab177f358bbcd433cb2000db1478e1b.zip
Output to cerr rather than cout so that debug info doesn't mess up assembly generation
llvm-svn: 840
Diffstat (limited to 'llvm/lib/Target/Sparc/SparcInternals.h')
-rw-r--r--llvm/lib/Target/Sparc/SparcInternals.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInternals.h b/llvm/lib/Target/Sparc/SparcInternals.h
index ad0f17f307d..812378c7bba 100644
--- a/llvm/lib/Target/Sparc/SparcInternals.h
+++ b/llvm/lib/Target/Sparc/SparcInternals.h
@@ -269,17 +269,14 @@ class UltraSparcRegInfo : public MachineRegInfo
else if( ty <= Type::DoubleTyID)
res = FloatRegClassID; // sparc float reg class
else {
- cout << "TypeID: " << ty << endl;
+ cerr << "TypeID: " << ty << endl;
assert(0 && "Cannot resolve register class for type");
-
}
if(isCCReg)
return res + 2; // corresponidng condition code regiser
-
else
return res;
-
}
// returns the register tha contains always zero
OpenPOWER on IntegriCloud